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Commit 63f8344c authored by Marc Zyngier's avatar Marc Zyngier Committed by Christoffer Dall
Browse files

arm64: boot protocol documentation update for GICv3 



Linux has some requirements that must be satisfied in order to boot
on a system built with a GICv3.

Acked-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent 96f68023

Documentation/arm64/booting.txt

+8 −0
Original line number Diff line number Diff line
@@ -141,6 +141,14 @@ Before jumping into the kernel, the following conditions must be met: 
  the kernel image will be entered must be initialised by software at a

  higher exception level to prevent execution in an UNKNOWN state.



  For systems with a GICv3 interrupt controller:

  - If EL3 is present:

    ICC_SRE_EL3.Enable (bit 3) must be initialiased to 0b1.

    ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1.

  - If the kernel is entered at EL1:

    ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1

    ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1.



The requirements described above for CPU mode, caches, MMUs, architected

timers, coherency and system registers apply to all CPUs.  All CPUs must

enter the kernel in the same exception level.