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Commit 626d2f07 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Vinod Koul
Browse files

dmaengine: usb-dmac: check CHCR.DE bit in usb_dmac_isr_channel() 



The USB-DMAC's interruption happens even if the CHCR.DE is not set to 1
because CHCR.NULLE is set to 1. So, this driver should call
usb_dmac_isr_transfer_end() if the DE bit is set to 1 only. Otherwise,
the desc is possible to be NULL in the usb_dmac_isr_transfer_end().

Fixes: 0c1c8ff3 ("dmaengine: usb-dmac: Add Renesas USB DMA Controller (USB-DMAC) driver)
Cc: <stable@vger.kernel.org> # v4.1+
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 29b4817d

drivers/dma/sh/usb-dmac.c

+11 −8
Original line number Diff line number Diff line
@@ -600,27 +600,30 @@ static irqreturn_t usb_dmac_isr_channel(int irq, void *dev) 
{

	struct usb_dmac_chan *chan = dev;

	irqreturn_t ret = IRQ_NONE;

	u32 mask = USB_DMACHCR_TE;

	u32 check_bits = USB_DMACHCR_TE | USB_DMACHCR_SP;

	u32 mask = 0;

	u32 chcr;

	bool xfer_end = false;



	spin_lock(&chan->vc.lock);



	chcr = usb_dmac_chan_read(chan, USB_DMACHCR);

	if (chcr & check_bits)

		mask |= USB_DMACHCR_DE | check_bits;

	if (chcr & (USB_DMACHCR_TE | USB_DMACHCR_SP)) {

		mask |= USB_DMACHCR_DE | USB_DMACHCR_TE | USB_DMACHCR_SP;

		if (chcr & USB_DMACHCR_DE)

			xfer_end = true;

		ret |= IRQ_HANDLED;

	}

	if (chcr & USB_DMACHCR_NULL) {

		/* An interruption of TE will happen after we set FTE */

		mask |= USB_DMACHCR_NULL;

		chcr |= USB_DMACHCR_FTE;

		ret |= IRQ_HANDLED;

	}

	if (mask)

		usb_dmac_chan_write(chan, USB_DMACHCR, chcr & ~mask);



	if (chcr & check_bits) {

	if (xfer_end)

		usb_dmac_isr_transfer_end(chan);

		ret |= IRQ_HANDLED;

	}



	spin_unlock(&chan->vc.lock);