Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 60c70d66 authored by Roger Quadros's avatar Roger Quadros Committed by Brian Norris
Browse files

mtd: nand: Prevent possible kernel lockup in nand_command() 



If a NAND device is not really present or pin muxes are not correctly
configured we can lock up the kernel waiting infinitely for NAND_STATUS
to be ready.

This can be easily reproduced on TI's DRA7-evm board by booting it
without NAND support in u-boot and disabling NAND pin muxes in the kernel.

Add timeout when waiting for NAND_CMD_RESET completion. As per ONFi v4.0
tRST can be upto 250ms for EZ-NAND and 5ms for raw NAND.

Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Tested-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 8cc7f33a

drivers/mtd/nand/nand_base.c

+23 −4
Original line number Original line Diff line number Diff line
@@ -565,6 +565,25 @@ void nand_wait_ready(struct mtd_info *mtd) 
}

}

EXPORT_SYMBOL_GPL(nand_wait_ready);

EXPORT_SYMBOL_GPL(nand_wait_ready);





/**

 * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands.

 * @mtd: MTD device structure

 * @timeo: Timeout in ms

 *

 * Wait for status ready (i.e. command done) or timeout.

 */

static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)

{

	register struct nand_chip *chip = mtd->priv;



	timeo = jiffies + msecs_to_jiffies(timeo);

	do {

		if ((chip->read_byte(mtd) & NAND_STATUS_READY))

			break;

		touch_softlockup_watchdog();

	} while (time_before(jiffies, timeo));

};



/**

/**

 * nand_command - [DEFAULT] Send command to NAND device

 * nand_command - [DEFAULT] Send command to NAND device

 * @mtd: MTD device structure

 * @mtd: MTD device structure
@@ -643,8 +662,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, 
			       NAND_CTRL_CLE | NAND_CTRL_CHANGE);

			       NAND_CTRL_CLE | NAND_CTRL_CHANGE);

		chip->cmd_ctrl(mtd,

		chip->cmd_ctrl(mtd,

			       NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

			       NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

		while (!(chip->read_byte(mtd) & NAND_STATUS_READY))

		/* EZ-NAND can take upto 250ms as per ONFi v4.0 */

				;

		nand_wait_status_ready(mtd, 250);

		return;

		return;





		/* This applies to read commands */

		/* This applies to read commands */
@@ -740,8 +759,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, 
			       NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

			       NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);

		chip->cmd_ctrl(mtd, NAND_CMD_NONE,

		chip->cmd_ctrl(mtd, NAND_CMD_NONE,

			       NAND_NCE | NAND_CTRL_CHANGE);

			       NAND_NCE | NAND_CTRL_CHANGE);

		while (!(chip->read_byte(mtd) & NAND_STATUS_READY))

		/* EZ-NAND can take upto 250ms as per ONFi v4.0 */

				;

		nand_wait_status_ready(mtd, 250);

		return;

		return;





	case NAND_CMD_RNDOUT:

	case NAND_CMD_RNDOUT: