Commit 60b3df9c authored Mar 13, 2009 by Peter Zijlstra Committed by Ingo Molnar Apr 06, 2009

perf_counter: add comment to barrier



We need to ensure the enabled=0 write happens before we
start disabling the actual counters, so that a pcm_amd_enable()
will not enable one underneath us.

I think the race is impossible anyway, we always balance the
ops within any one context and perform enable() with IRQs disabled.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

parent 75564232

arch/x86/kernel/cpu/perf_counter.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -247,6 +247,10 @@ static u64 pmc_amd_save_disable_all(void)

		enabled = cpuc->enabled;
		cpuc->enabled = 0;
		/*
		* ensure we write the disable before we start disabling the
		* counters proper, so that pcm_amd_enable() does the right thing.
		*/
		barrier();

		for (idx = 0; idx < nr_counters_generic; idx++) {