Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5fbf3e32 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-for-4.8-rc6' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "Two sets of i915 fixes, one set of vc4 crasher fixes, and a couple of
  atmel fixes.

  Nothing too out there at this stage, though I think some people are
  holidaying so it's been quiet enough"

* tag 'drm-fixes-for-4.8-rc6' of git://people.freedesktop.org/~airlied/linux:
  drm/i915: Ignore OpRegion panel type except on select machines
  Revert "drm/i915/psr: Make idle_frames sensible again"
  drm/i915: Restore lost "Initialized i915" welcome message
  drm/vc4: mark vc4_bo_cache_purge() static
  drm/i915: Add GEN7_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE to SNB
  drm/i915: disable 48bit full PPGTT when vGPU is active
  drm/i915: enable vGPU detection for all
  drm/atmel-hlcdc: Make ->reset() implementation static
  drm: atmel-hlcdc: Fix vertical scaling
  drm/vc4: Allow some more signals to be packed with uniform resets.
  drm/i915/dvo: Remove dangling call to drm_encoder_cleanup()
parents 095f5cfa 09cb5b78
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -387,7 +387,7 @@ void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
	atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
}

void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
{
	struct atmel_hlcdc_crtc_state *state;

+5 −5
Original line number Diff line number Diff line
@@ -320,19 +320,19 @@ atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane,
			u32 *coeff_tab = heo_upscaling_ycoef;
			u32 max_memsize;

			if (state->crtc_w < state->src_w)
			if (state->crtc_h < state->src_h)
				coeff_tab = heo_downscaling_ycoef;
			for (i = 0; i < ARRAY_SIZE(heo_upscaling_ycoef); i++)
				atmel_hlcdc_layer_update_cfg(&plane->layer,
							     33 + i,
							     0xffffffff,
							     coeff_tab[i]);
			factor = ((8 * 256 * state->src_w) - (256 * 4)) /
				 state->crtc_w;
			factor = ((8 * 256 * state->src_h) - (256 * 4)) /
				 state->crtc_h;
			factor++;
			max_memsize = ((factor * state->crtc_w) + (256 * 4)) /
			max_memsize = ((factor * state->crtc_h) + (256 * 4)) /
				      2048;
			if (max_memsize > state->src_w)
			if (max_memsize > state->src_h)
				factor--;
			factor_reg |= (factor << 16) | 0x80000000;
		}
+5 −0
Original line number Diff line number Diff line
@@ -1281,6 +1281,11 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)

	intel_runtime_pm_enable(dev_priv);

	/* Everything is in place, we can now relax! */
	DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
		 driver.name, driver.major, driver.minor, driver.patchlevel,
		 driver.date, pci_name(pdev), dev_priv->drm.primary->index);

	intel_runtime_pm_put(dev_priv);

	return 0;
+6 −3
Original line number Diff line number Diff line
@@ -122,8 +122,11 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
	has_full_48bit_ppgtt =
	       	IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9;

	if (intel_vgpu_active(dev_priv))
		has_full_ppgtt = false; /* emulation is too hard */
	if (intel_vgpu_active(dev_priv)) {
		/* emulation is too hard */
		has_full_ppgtt = false;
		has_full_48bit_ppgtt = false;
	}

	if (!has_aliasing_ppgtt)
		return 0;
@@ -158,7 +161,7 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
		return 0;
	}

	if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists)
	if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists && has_full_ppgtt)
		return has_full_48bit_ppgtt ? 3 : 2;
	else
		return has_aliasing_ppgtt ? 1 : 0;
+0 −3
Original line number Diff line number Diff line
@@ -65,9 +65,6 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)

	BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);

	if (!IS_HASWELL(dev_priv))
		return;

	magic = __raw_i915_read64(dev_priv, vgtif_reg(magic));
	if (magic != VGT_MAGIC)
		return;
Loading