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Commit 5f7b88d5 authored by Tony Luck's avatar Tony Luck
Browse files

x86/mce: Recognise machine check bank signature for data path error 



Action required data path signature is defined in table 15-19 of SDM:

+-----------------------------------------------------------------------------+
| SRAR Error | Valid | OVER | UC | EN | MISCV | ADDRV | PCC | S | AR | MCACOD |
| Data Load  |     1 |    0 |  1 |  1 |     1 |     1 |   0 | 1 |  1 |  0x134 |
+-----------------------------------------------------------------------------+

Recognise this, and pass MCE_AR_SEVERITY code back to do_machine_check() if
we have the action handler configured (CONFIG_MEMORY_FAILURE=y)

Acked-by: default avatarBorislav Petkov <bp@amd64.org>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent a8c321fb

arch/x86/kernel/cpu/mcheck/mce-severity.c

+15 −1
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ static struct severity { 
#define  MASK(x, y)	.mask = x, .result = y

#define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)

#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)

#define	MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)

#define MCACOD 0xffff



	MCESEV(
@@ -102,11 +103,24 @@ static struct severity { 
		SER, BITCLR(MCI_STATUS_S)

		),



	/* AR add known MCACODs here */

	MCESEV(

		PANIC, "Action required with lost events",

		SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR)

		),



	/* known AR MCACODs: */

#ifdef	CONFIG_MEMORY_FAILURE

	MCESEV(

		KEEP, "HT thread notices Action required: data load error",

		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|0x0134),

		MCGMASK(MCG_STATUS_EIPV, 0)

		),

	MCESEV(

		AR, "Action required: data load error",

		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|0x0134),

		USER

		),

#endif

	MCESEV(

		PANIC, "Action required: unknown MCACOD",

		SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)