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Commit 5f1201d5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 

Pull clock framework updates from Michael Turquette:
 "The changes to the common clock framework for 4.2 are dominated by new
  drivers and updates to existing ones, as usual.

  There are some fixes to the framework itself and several cleanups for
  sparse warnings, etc"

* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
  clk: stm32: Add clock driver for STM32F4[23]xxx devices
  dt-bindings: Document the STM32F4 clock bindings
  cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
  ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
  clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
  clk: samsung: add infrastructure to register cpu clocks
  clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
  doc: dt: add documentation for lpc1850-ccu clk driver
  clk: add lpc18xx ccu clk driver
  doc: dt: add documentation for lpc1850-cgu clk driver
  clk: add lpc18xx cgu clk driver
  clk: keystone: add support for post divider register for main pll
  clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
  clk: cygnus: remove Cygnus dummy clock binding
  clk: cygnus: add clock support for Broadcom Cygnus
  clk: Change bcm clocks build dependency
  clk: iproc: add initial common clock support
  clk: iproc: define Broadcom iProc clock binding
  MAINTAINERS: update email for Michael Turquette
  clk: meson: add some error handling in meson_clk_register_cpu()
  ...
parents 13d45f79 358bdf89

Documentation/clk.txt

+2 −25
Original line number Diff line number Diff line
@@ -230,30 +230,7 @@ clk_register(...) 


See the basic clock types in drivers/clk/clk-*.c for examples.



	Part 5 - static initialization of clock data



For platforms with many clocks (often numbering into the hundreds) it

may be desirable to statically initialize some clock data.  This

presents a problem since the definition of struct clk should be hidden

from everyone except for the clock core in drivers/clk/clk.c.



To get around this problem struct clk's definition is exposed in

include/linux/clk-private.h along with some macros for more easily

initializing instances of the basic clock types.  These clocks must

still be initialized with the common clock framework via a call to

__clk_init.



clk-private.h must NEVER be included by code which implements struct

clk_ops callbacks, nor must it be included by any logic which pokes

around inside of struct clk at run-time.  To do so is a layering

violation.



To better enforce this policy, always follow this simple rule: any

statically initialized clock data MUST be defined in a separate file

from the logic that implements its ops.  Basically separate the logic

from the data and all is well.



	Part 6 - Disabling clock gating of unused clocks

	Part 5 - Disabling clock gating of unused clocks



Sometimes during development it can be useful to be able to bypass the

default disabling of unused clocks. For example, if drivers aren't enabling
@@ -264,7 +241,7 @@ are sorted out. 
To bypass this disabling, include "clk_ignore_unused" in the bootargs to the

kernel.



	Part 7 - Locking

	Part 6 - Locking



The common clock framework uses two global locks, the prepare lock and the

enable lock.

Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt

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Mediatek apmixedsys controller

==============================



The Mediatek apmixedsys controller provides the PLLs to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt8135-apmixedsys"

	- "mediatek,mt8173-apmixedsys"

- #clock-cells: Must be 1



The apmixedsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



apmixedsys: clock-controller@10209000 {

	compatible = "mediatek,mt8173-apmixedsys";

	reg = <0 0x10209000 0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt

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Mediatek infracfg controller

============================



The Mediatek infracfg controller provides various clocks and reset

outputs to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt8135-infracfg", "syscon"

	- "mediatek,mt8173-infracfg", "syscon"

- #clock-cells: Must be 1

- #reset-cells: Must be 1



The infracfg controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Also it uses the common reset controller binding from

Documentation/devicetree/bindings/reset/reset.txt.

The available reset outputs are defined in

dt-bindings/reset-controller/mt*-resets.h



Example:



infracfg: power-controller@10001000 {

	compatible = "mediatek,mt8173-infracfg", "syscon";

	reg = <0 0x10001000 0 0x1000>;

	#clock-cells = <1>;

	#reset-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt

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Mediatek pericfg controller

===========================



The Mediatek pericfg controller provides various clocks and reset

outputs to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt8135-pericfg", "syscon"

	- "mediatek,mt8173-pericfg", "syscon"

- #clock-cells: Must be 1

- #reset-cells: Must be 1



The pericfg controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Also it uses the common reset controller binding from

Documentation/devicetree/bindings/reset/reset.txt.

The available reset outputs are defined in

dt-bindings/reset-controller/mt*-resets.h



Example:



pericfg: power-controller@10003000 {

	compatible = "mediatek,mt8173-pericfg", "syscon";

	reg = <0 0x10003000 0 0x1000>;

	#clock-cells = <1>;

	#reset-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt

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Mediatek topckgen controller

============================



The Mediatek topckgen controller provides various clocks to the system.



Required Properties:



- compatible: Should be:

	- "mediatek,mt8135-topckgen"

	- "mediatek,mt8173-topckgen"

- #clock-cells: Must be 1



The topckgen controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



topckgen: power-controller@10000000 {

	compatible = "mediatek,mt8173-topckgen";

	reg = <0 0x10000000 0 0x1000>;

	#clock-cells = <1>;

};