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Commit 5e2c6883 authored by Nadav Amit's avatar Nadav Amit Committed by Marcelo Tosatti
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KVM: x86: fix mov immediate emulation for 64-bit operands 

MOV immediate instruction (opcodes 0xB8-0xBF) may take 64-bit operand.
The previous emulation implementation assumes the operand is no longer than 32.
Adding OpImm64 for this matter.

Fixes https://bugzilla.redhat.com/show_bug.cgi?id=881579



Signed-off-by: default avatarNadav Amit <nadav.amit@gmail.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
parent 7f662273

arch/x86/kvm/emulate.c

+10 −2
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ 
#define OpCL               9ull  /* CL register (for shifts) */

#define OpImmByte         10ull  /* 8-bit sign extended immediate */

#define OpOne             11ull  /* Implied 1 */

#define OpImm             12ull  /* Sign extended immediate */

#define OpImm             12ull  /* Sign extended up to 32-bit immediate */

#define OpMem16           13ull  /* Memory operand (16-bit). */

#define OpMem32           14ull  /* Memory operand (32-bit). */

#define OpImmU            15ull  /* Immediate operand, zero extended */
@@ -58,6 +58,7 @@ 
#define OpFS              24ull  /* FS */

#define OpGS              25ull  /* GS */

#define OpMem8            26ull  /* 8-bit zero extended memory operand */

#define OpImm64           27ull  /* Sign extended 16/32/64-bit immediate */



#define OpBits             5  /* Width of operand field */

#define OpMask             ((1ull << OpBits) - 1)
@@ -101,6 +102,7 @@ 
#define SrcMemFAddr (OpMemFAddr << SrcShift)

#define SrcAcc      (OpAcc << SrcShift)

#define SrcImmU16   (OpImmU16 << SrcShift)

#define SrcImm64    (OpImm64 << SrcShift)

#define SrcDX       (OpDX << SrcShift)

#define SrcMem8     (OpMem8 << SrcShift)

#define SrcMask     (OpMask << SrcShift)
@@ -3807,7 +3809,7 @@ static const struct opcode opcode_table[256] = { 
	/* 0xB0 - 0xB7 */

	X8(I(ByteOp | DstReg | SrcImm | Mov, em_mov)),

	/* 0xB8 - 0xBF */

	X8(I(DstReg | SrcImm | Mov, em_mov)),

	X8(I(DstReg | SrcImm64 | Mov, em_mov)),

	/* 0xC0 - 0xC7 */

	D2bv(DstMem | SrcImmByte | ModRM),

	I(ImplicitOps | Stack | SrcImmU16, em_ret_near_imm),
@@ -3971,6 +3973,9 @@ static int decode_imm(struct x86_emulate_ctxt *ctxt, struct operand *op, 
	case 4:

		op->val = insn_fetch(s32, ctxt);

		break;

	case 8:

		op->val = insn_fetch(s64, ctxt);

		break;

	}

	if (!sign_extension) {

		switch (op->bytes) {
@@ -4049,6 +4054,9 @@ static int decode_operand(struct x86_emulate_ctxt *ctxt, struct operand *op, 
	case OpImm:

		rc = decode_imm(ctxt, op, imm_size(ctxt), true);

		break;

	case OpImm64:

		rc = decode_imm(ctxt, op, ctxt->op_bytes, true);

		break;

	case OpMem8:

		ctxt->memop.bytes = 1;

		goto mem_common;