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Commit 5b795d05 authored by Joseph Lo's avatar Joseph Lo Committed by Stephen Warren
Browse files

ARM: tegra: add common resume handling code for LP1 resuming 



Add support to the Tegra CPU reset vector to detect whether the CPU is
resuming from LP1 suspend state. If it is, branch to the LP1-specific
resume code.

When Tegra enters the LP1 suspend state, the SDRAM controller is placed
into a self-refresh state. For this reason, we must place the LP1 resume
code into IRAM, so that it is accessible before SDRAM access has been
re-enabled.

Signed-off-by: default avatarJoseph Lo <josephl@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 20984c44

arch/arm/mach-tegra/iomap.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -24,6 +24,8 @@ 
#define TEGRA_IRAM_BASE			0x40000000

#define TEGRA_IRAM_BASE			0x40000000

#define TEGRA_IRAM_SIZE			SZ_256K

#define TEGRA_IRAM_SIZE			SZ_256K





#define TEGRA_IRAM_CODE_AREA		(TEGRA_IRAM_BASE + SZ_4K)



#define TEGRA_HOST1X_BASE		0x50000000

#define TEGRA_HOST1X_BASE		0x50000000

#define TEGRA_HOST1X_SIZE		0x24000

#define TEGRA_HOST1X_SIZE		0x24000

arch/arm/mach-tegra/reset-handler.S

+13 −0
Original line number Original line Diff line number Diff line
@@ -182,6 +182,19 @@ after_errata: 
1:

1:

#endif

#endif





	/* Waking up from LP1? */

	ldr	r8, [r12, #RESET_DATA(MASK_LP1)]

	tst	r8, r11				@ if in_lp1

	beq	__is_not_lp1

	cmp	r10, #0

	bne	__die				@ only CPU0 can be here

	ldr	lr, [r12, #RESET_DATA(STARTUP_LP1)]

	cmp	lr, #0

	bleq	__die				@ no LP1 startup handler

 THUMB(	add	lr, lr, #1 )			@ switch to Thumb mode

	bx	lr

__is_not_lp1:



	/* Waking up from LP2? */

	/* Waking up from LP2? */

	ldr	r9, [r12, #RESET_DATA(MASK_LP2)]

	ldr	r9, [r12, #RESET_DATA(MASK_LP2)]

	tst	r9, r11				@ if in_lp2

	tst	r9, r11				@ if in_lp2

arch/arm/mach-tegra/reset.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -81,6 +81,8 @@ void __init tegra_cpu_reset_handler_init(void) 
#endif

#endif





#ifdef CONFIG_PM_SLEEP

#ifdef CONFIG_PM_SLEEP

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP1] =

		TEGRA_IRAM_CODE_AREA;

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP2] =

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP2] =

		virt_to_phys((void *)tegra_resume);

		virt_to_phys((void *)tegra_resume);

#endif

#endif