Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5ac447d2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-4.12-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull powerpc fixes from Michael Ellerman:
 "Three small fixes for recently merged code:

   - remove a spurious WARN_ON when a PCI device has no of_node, it's
     allowed in some circumstances for there to be no of_node.

   - fix the offset for store EOI MMIOs in the XIVE interrupt
     controller.

   - fix non-const WARN_ONs which were becoming BUGs due to them losing
     BUGFLAG_WARNING in a recent cleanup patch.

  Thanks to: Alexey Kardashevskiy, Alistair Popple, Benjamin
  Herrenschmidt"

* tag 'powerpc-4.12-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/debug: Add missing warn flag to WARN_ON's non-builtin path
  powerpc/xive: Fix offset for store EOI MMIOs
  powerpc/npu-dma: Remove spurious WARN_ON when a PCI device has no of_node
parents ab2789b7 a093c92d

arch/powerpc/include/asm/bug.h

+1 −1
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ 
		"1:	"PPC_TLNEI"	%4,0\n"			\

		_EMIT_BUG_ENTRY					\

		: : "i" (__FILE__), "i" (__LINE__),		\

		  "i" (BUGFLAG_TAINT(TAINT_WARN)),		\

		  "i" (BUGFLAG_WARNING|BUGFLAG_TAINT(TAINT_WARN)),\

		  "i" (sizeof(struct bug_entry)),		\

		  "r" (__ret_warn_on));				\

	}							\

arch/powerpc/include/asm/xive.h

+7 −5
Original line number Diff line number Diff line
@@ -94,11 +94,13 @@ struct xive_q { 
 * store at 0 and some ESBs support doing a trigger via a

 * separate trigger page.

 */

#define XIVE_ESB_GET		0x800

#define XIVE_ESB_SET_PQ_00	0xc00

#define XIVE_ESB_SET_PQ_01	0xd00

#define XIVE_ESB_SET_PQ_10	0xe00

#define XIVE_ESB_SET_PQ_11	0xf00

#define XIVE_ESB_STORE_EOI	0x400 /* Store */

#define XIVE_ESB_LOAD_EOI	0x000 /* Load */

#define XIVE_ESB_GET		0x800 /* Load */

#define XIVE_ESB_SET_PQ_00	0xc00 /* Load */

#define XIVE_ESB_SET_PQ_01	0xd00 /* Load */

#define XIVE_ESB_SET_PQ_10	0xe00 /* Load */

#define XIVE_ESB_SET_PQ_11	0xf00 /* Load */



#define XIVE_ESB_VAL_P		0x2

#define XIVE_ESB_VAL_Q		0x1

arch/powerpc/kvm/book3s_xive_template.c

+2 −2
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static void GLUE(X_PFX,source_eoi)(u32 hw_irq, struct xive_irq_data *xd) 
{

	/* If the XIVE supports the new "store EOI facility, use it */

	if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI)

		__x_writeq(0, __x_eoi_page(xd));

		__x_writeq(0, __x_eoi_page(xd) + XIVE_ESB_STORE_EOI);

	else if (hw_irq && xd->flags & XIVE_IRQ_FLAG_EOI_FW) {

		opal_int_eoi(hw_irq);

	} else {
@@ -89,7 +89,7 @@ static void GLUE(X_PFX,source_eoi)(u32 hw_irq, struct xive_irq_data *xd) 
		 * properly.

		 */

		if (xd->flags & XIVE_IRQ_FLAG_LSI)

			__x_readq(__x_eoi_page(xd));

			__x_readq(__x_eoi_page(xd) + XIVE_ESB_LOAD_EOI);

		else {

			eoi_val = GLUE(X_PFX,esb_load)(xd, XIVE_ESB_SET_PQ_00);

arch/powerpc/platforms/powernv/npu-dma.c

+2 −1
Original line number Diff line number Diff line
@@ -75,7 +75,8 @@ struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index) 
	if (WARN_ON(!gpdev))

		return NULL;



	if (WARN_ON(!gpdev->dev.of_node))

	/* Not all PCI devices have device-tree nodes */

	if (!gpdev->dev.of_node)

		return NULL;



	/* Get assoicated PCI device */

arch/powerpc/sysdev/xive/common.c

+1 −1
Original line number Diff line number Diff line
@@ -297,7 +297,7 @@ void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd) 
{

	/* If the XIVE supports the new "store EOI facility, use it */

	if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI)

		out_be64(xd->eoi_mmio, 0);

		out_be64(xd->eoi_mmio + XIVE_ESB_STORE_EOI, 0);

	else if (hw_irq && xd->flags & XIVE_IRQ_FLAG_EOI_FW) {

		/*

		 * The FW told us to call it. This happens for some