Commit 5a88b0d1 authored Mar 06, 2013 by Yen Lin Committed by Stephen Warren Apr 04, 2013

clk: tegra: Fix periph_clk_to_bit macro



The parameter name should be "gate", not "periph".  This worked, however,
because it happens that everywhere periph_clk_to_bit is called, "gate" was
in the local scope.

Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Andrew Chew <achew@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

parent 43089433

drivers/clk/tegra/clk-periph-gate.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -41,7 +41,7 @@ static DEFINE_SPINLOCK(periph_ref_lock);
		#define write_rst_clr(val, gate) \
		writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))

		#define periph_clk_to_bit(periph) (1 << (gate->clk_num % 32))
		#define periph_clk_to_bit(gate) (1 << (gate->clk_num % 32))

		/* Peripheral gate clock ops */
		static int clk_periph_is_enabled(struct clk_hw *hw)