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Commit 589cb22b authored by Will Deacon's avatar Will Deacon
Browse files

arm64: compat: fix stxr failure case in SWP emulation 



If the STXR instruction fails in the SWP emulation code, we leave *data
overwritten with the loaded value, therefore corrupting the data written
by a subsequent, successful attempt.

This patch re-jigs the code so that we only write back to *data once we
know that the update has happened.

Cc: <stable@vger.kernel.org>
Fixes: bd35a4ad ("arm64: Port SWP/SWPB emulation support from arm")
Reported-by: default avatarShengjiu Wang <shengjiu.wang@freescale.com>
Reported-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 32b88194

arch/arm64/kernel/armv8_deprecated.c

+9 −7
Original line number Diff line number Diff line
@@ -284,21 +284,23 @@ static void register_insn_emulation_sysctl(struct ctl_table *table) 
	__asm__ __volatile__(					\

	ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN,	\

		    CONFIG_ARM64_PAN)				\

	"	mov		%w2, %w1\n"			\

	"0:	ldxr"B"		%w1, [%3]\n"			\

	"1:	stxr"B"		%w0, %w2, [%3]\n"		\

	"0:	ldxr"B"		%w2, [%3]\n"			\

	"1:	stxr"B"		%w0, %w1, [%3]\n"		\

	"	cbz		%w0, 2f\n"			\

	"	mov		%w0, %w4\n"			\

	"	b		3f\n"				\

	"2:\n"							\

	"	mov		%w1, %w2\n"			\

	"3:\n"							\

	"	.pushsection	 .fixup,\"ax\"\n"		\

	"	.align		2\n"				\

	"3:	mov		%w0, %w5\n"			\

	"	b		2b\n"				\

	"4:	mov		%w0, %w5\n"			\

	"	b		3b\n"				\

	"	.popsection"					\

	"	.pushsection	 __ex_table,\"a\"\n"		\

	"	.align		3\n"				\

	"	.quad		0b, 3b\n"			\

	"	.quad		1b, 3b\n"			\

	"	.quad		0b, 4b\n"			\

	"	.quad		1b, 4b\n"			\

	"	.popsection\n"					\

	ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN,	\

		CONFIG_ARM64_PAN)				\