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Commit 571cb17b authored by Boris Brezillon's avatar Boris Brezillon
Browse files

Merge tag 'nand/for-4.16' of git://git.infradead.org/linux-mtd into mtd/next 

Pull NAND changes from Boris Brezillon:

"
  Core changes:
  * Fix NAND_CMD_NONE handling in nand_command[_lp]() hooks
  * Introduce the ->exec_op() infrastructure
  * Rework NAND buffers handling
  * Fix ECC requirements for K9F4G08U0D
  * Fix nand_do_read_oob() to return the number of bitflips
  * Mark K9F1G08U0E as not supporting subpage writes

  Driver changes:
  * MTK: Rework the driver to support new IP versions
  * OMAP OneNAND: Full rework to use new APIs (libgpio, dmaengine) and fix
    DT support
  * Marvell: Add a new driver to replace the pxa3xx one
"
parents c8f22b02 f4c6cd1a

Documentation/devicetree/bindings/mtd/gpmc-onenand.txt

+4 −2
Original line number Diff line number Diff line
@@ -9,13 +9,14 @@ Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 


Required properties:



 - compatible:		"ti,omap2-onenand"

 - reg:			The CS line the peripheral is connected to

 - gpmc,device-width	Width of the ONENAND device connected to the GPMC

 - gpmc,device-width:	Width of the ONENAND device connected to the GPMC

			in bytes. Must be 1 or 2.



Optional properties:



 - dma-channel:		DMA Channel index

 - int-gpios:		GPIO specifier for the INT pin.



For inline partition table parsing (optional):
@@ -35,6 +36,7 @@ Example for an OMAP3430 board: 
		#size-cells = <1>;



		onenand@0 {

			compatible = "ti,omap2-onenand";

			reg = <0 0 0>; /* CS0, offset 0 */

			gpmc,device-width = <2>;

Documentation/devicetree/bindings/mtd/marvell-nand.txt

0 → 100644
+123 −0
Original line number Diff line number Diff line 
Marvell NAND Flash Controller (NFC)



Required properties:

- compatible: can be one of the following:

    * "marvell,armada-8k-nand-controller"

    * "marvell,armada370-nand-controller"

    * "marvell,pxa3xx-nand-controller"

    * "marvell,armada-8k-nand" (deprecated)

    * "marvell,armada370-nand" (deprecated)

    * "marvell,pxa3xx-nand" (deprecated)

  Compatibles marked deprecated support only the old bindings described

  at the bottom.

- reg: NAND flash controller memory area.

- #address-cells: shall be set to 1. Encode the NAND CS.

- #size-cells: shall be set to 0.

- interrupts: shall define the NAND controller interrupt.

- clocks: shall reference the NAND controller clock.

- marvell,system-controller: Set to retrieve the syscon node that handles

  NAND controller related registers (only required with the

  "marvell,armada-8k-nand[-controller]" compatibles).



Optional properties:

- label: see partition.txt. New platforms shall omit this property.

- dmas: shall reference DMA channel associated to the NAND controller.

  This property is only used with "marvell,pxa3xx-nand[-controller]"

  compatible strings.

- dma-names: shall be "rxtx".

  This property is only used with "marvell,pxa3xx-nand[-controller]"

  compatible strings.



Optional children nodes:

Children nodes represent the available NAND chips.



Required properties:

- reg: shall contain the native Chip Select ids (0-3).

- nand-rb: see nand.txt (0-1).



Optional properties:

- marvell,nand-keep-config: orders the driver not to take the timings

  from the core and leaving them completely untouched. Bootloader

  timings will then be used.

- label: MTD name.

- nand-on-flash-bbt: see nand.txt.

- nand-ecc-mode: see nand.txt. Will use hardware ECC if not specified.

- nand-ecc-algo: see nand.txt. This property is essentially useful when

  not using hardware ECC. Howerver, it may be added when using hardware

  ECC for clarification but will be ignored by the driver because ECC

  mode is chosen depending on the page size and the strength required by

  the NAND chip. This value may be overwritten with nand-ecc-strength

  property.

- nand-ecc-strength: see nand.txt.

- nand-ecc-step-size: see nand.txt. Marvell's NAND flash controller does

  use fixed strength (1-bit for Hamming, 16-bit for BCH), so the actual

  step size will shrink or grow in order to fit the required strength.

  Step sizes are not completely random for all and follow certain

  patterns described in AN-379, "Marvell SoC NFC ECC".



See Documentation/devicetree/bindings/mtd/nand.txt for more details on

generic bindings.





Example:

nand_controller: nand-controller@d0000 {

	compatible = "marvell,armada370-nand-controller";

	reg = <0xd0000 0x54>;

	#address-cells = <1>;

	#size-cells = <0>;

	interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&coredivclk 0>;



	nand@0 {

		reg = <0>;

		label = "main-storage";

		nand-rb = <0>;

		nand-ecc-mode = "hw";

		marvell,nand-keep-config;

		nand-on-flash-bbt;

		nand-ecc-strength = <4>;

		nand-ecc-step-size = <512>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			partition@0 {

				label = "Rootfs";

				reg = <0x00000000 0x40000000>;

			};

		};

	};

};





Note on legacy bindings: One can find, in not-updated device trees,

bindings slightly different than described above with other properties

described below as well as the partitions node at the root of a so

called "nand" node (without clear controller/chip separation).



Legacy properties:

- marvell,nand-enable-arbiter: To enable the arbiter, all boards blindly

  used it, this bit was set by the bootloader for many boards and even if

  it is marked reserved in several datasheets, it might be needed to set

  it (otherwise it is harmless) so whether or not this property is set,

  the bit is selected by the driver.

- num-cs: Number of chip-select lines to use, all boards blindly set 1

  to this and for a reason, other values would have failed. The value of

  this property is ignored.



Example:



	nand0: nand@43100000 {

		compatible = "marvell,pxa3xx-nand";

		reg = <0x43100000 90>;

		interrupts = <45>;

		dmas = <&pdma 97 0>;

		dma-names = "rxtx";

		#address-cells = <1>;

		marvell,nand-keep-config;

		marvell,nand-enable-arbiter;

		num-cs = <1>;

		/* Partitions (optional) */

       };

Documentation/devicetree/bindings/mtd/mtk-nand.txt

+8 −3
Original line number Diff line number Diff line
@@ -12,8 +12,10 @@ tree nodes. 


The first part of NFC is NAND Controller Interface (NFI) HW.

Required NFI properties:

- compatible:			Should be one of "mediatek,mt2701-nfc",

				"mediatek,mt2712-nfc".

- compatible:			Should be one of

				"mediatek,mt2701-nfc",

				"mediatek,mt2712-nfc",

				"mediatek,mt7622-nfc".

- reg:				Base physical address and size of NFI.

- interrupts:			Interrupts of NFI.

- clocks:			NFI required clocks.
@@ -142,7 +144,10 @@ Example: 
==============



Required BCH properties:

- compatible:	Should be one of "mediatek,mt2701-ecc", "mediatek,mt2712-ecc".

- compatible:	Should be one of

		"mediatek,mt2701-ecc",

		"mediatek,mt2712-ecc",

		"mediatek,mt7622-ecc".

- reg:		Base physical address and size of ECC.

- interrupts:	Interrupts of ECC.

- clocks:	ECC required clocks.

Documentation/devicetree/bindings/mtd/nand.txt

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ Optional NAND chip properties: 
		     This is particularly useful when only the in-band area is

		     used by the upper layers, and you want to make your NAND

		     as reliable as possible.

- nand-rb: shall contain the native Ready/Busy ids.



The ECC strength and ECC step size properties define the correction capability

of a controller. Together, they say a controller can correct "{strength} bit

MAINTAINERS

+15 −7
Original line number Diff line number Diff line
@@ -2382,13 +2382,6 @@ F: Documentation/devicetree/bindings/input/atmel,maxtouch.txt 
F:	drivers/input/touchscreen/atmel_mxt_ts.c

F:	include/linux/platform_data/atmel_mxt_ts.h



ATMEL NAND DRIVER

M:	Wenyou Yang <wenyou.yang@atmel.com>

M:	Josh Wu <rainyfeeling@outlook.com>

L:	linux-mtd@lists.infradead.org

S:	Supported

F:	drivers/mtd/nand/atmel/*



ATMEL SAMA5D2 ADC DRIVER

M:	Ludovic Desroches <ludovic.desroches@microchip.com>

L:	linux-iio@vger.kernel.org
@@ -8409,6 +8402,13 @@ L: linux-wireless@vger.kernel.org 
S:	Odd Fixes

F:	drivers/net/wireless/marvell/mwl8k.c



MARVELL NAND CONTROLLER DRIVER

M:	Miquel Raynal <miquel.raynal@free-electrons.com>

L:	linux-mtd@lists.infradead.org

S:	Maintained

F:	drivers/mtd/nand/marvell_nand.c

F:	Documentation/devicetree/bindings/mtd/marvell-nand.txt



MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER

M:	Nicolas Pitre <nico@fluxnic.net>

S:	Odd Fixes
@@ -9045,6 +9045,14 @@ F: drivers/media/platform/atmel/atmel-isc.c 
F:	drivers/media/platform/atmel/atmel-isc-regs.h

F:	devicetree/bindings/media/atmel-isc.txt



MICROCHIP / ATMEL NAND DRIVER

M:	Wenyou Yang <wenyou.yang@microchip.com>

M:	Josh Wu <rainyfeeling@outlook.com>

L:	linux-mtd@lists.infradead.org

S:	Supported

F:	drivers/mtd/nand/atmel/*

F:	Documentation/devicetree/bindings/mtd/atmel-nand.txt



MICROCHIP KSZ SERIES ETHERNET SWITCH DRIVER

M:	Woojung Huh <Woojung.Huh@microchip.com>

M:	Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>