Merge branch 'pm-upstream/debug' of... (5567fa1f) · Commits · e / devices / android_kernel_teracube_emerald

arch/arm/mach-omap2/clock.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk)
		omap2_clk_disable(clk);
		} else
		_omap2_clk_disable(clk);
		if (clk->clkdm != NULL)
		pwrdm_clkdm_state_switch(clk->clkdm);
		}
		#endif

arch/arm/mach-omap2/clockdomain.c

+8 −2

Original line number	Diff line number	Diff line
		@@ -299,7 +299,8 @@ struct clockdomain clkdm_lookup(const char name)
		* anything else to indicate failure; or -EINVAL if the function pointer
		* is null.
		*/
		int clkdm_for_each(int (fn)(struct clockdomain clkdm))
		int clkdm_for_each(int (fn)(struct clockdomain clkdm, void *user),
		void *user)
		{
		struct clockdomain *clkdm;
		int ret = 0;
		@@ -309,7 +310,7 @@ int clkdm_for_each(int (fn)(struct clockdomain clkdm))

		mutex_lock(&clkdm_mutex);
		list_for_each_entry(clkdm, &clkdm_list, node) {
		ret = (*fn)(clkdm);
		ret = (*fn)(clkdm, user);
		if (ret)
		break;
		}
		@@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
		v << __ffs(clkdm->clktrctrl_mask),
		clkdm->pwrdm.ptr->prcm_offs,
		CM_CLKSTCTRL);

		pwrdm_clkdm_state_switch(clkdm);
		}

		/**
		@@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain clkdm, struct clk clk)
		omap2_clkdm_wakeup(clkdm);

		pwrdm_wait_transition(clkdm->pwrdm.ptr);
		pwrdm_clkdm_state_switch(clkdm);

		return 0;
		}
		@@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain clkdm, struct clk clk)
		else
		omap2_clkdm_sleep(clkdm);

		pwrdm_clkdm_state_switch(clkdm);

		return 0;
		}

arch/arm/mach-omap2/pm-debug.c

+428 −1

Original line number	Diff line number	Diff line
		@@ -20,13 +20,16 @@
		*/

		#include <linux/kernel.h>
		#include <linux/timer.h>
		#include <linux/sched.h>
		#include <linux/clk.h>
		#include <linux/err.h>
		#include <linux/io.h>
		#include <linux/module.h>

		#include <mach/clock.h>
		#include <mach/board.h>
		#include <mach/powerdomain.h>
		#include <mach/clockdomain.h>

		#include "prm.h"
		#include "cm.h"
		@@ -50,6 +53,8 @@ int omap2_pm_debug;
		regs[reg_count].name = #reg; \
		regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))

		static int __init pm_dbg_init(void);

		void omap2_pm_dump(int mode, int resume, unsigned int us)
		{
		struct reg {
		@@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
		for (i = 0; i < reg_count; i++)
		printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
		}

		#ifdef CONFIG_DEBUG_FS
		#include <linux/debugfs.h>
		#include <linux/seq_file.h>

		static void pm_dbg_regset_store(u32 *ptr);

		struct dentry *pm_dbg_dir;

		static int pm_dbg_init_done;

		enum {
		DEBUG_FILE_COUNTERS = 0,
		DEBUG_FILE_TIMERS,
		};

		struct pm_module_def {
		char name[8]; /* Name of the module */
		short type; /* CM or PRM */
		unsigned short offset;
		int low; /* First register address on this module */
		int high; /* Last register address on this module */
		};

		#define MOD_CM 0
		#define MOD_PRM 1

		static const struct pm_module_def *pm_dbg_reg_modules;
		static const struct pm_module_def omap3_pm_reg_modules[] = {
		{ "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
		{ "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
		{ "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
		{ "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
		{ "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
		{ "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
		{ "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
		{ "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
		{ "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
		{ "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
		{ "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
		{ "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
		{ "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },

		{ "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
		{ "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
		{ "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
		{ "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
		{ "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
		{ "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
		{ "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
		{ "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
		{ "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
		{ "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
		{ "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
		{ "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
		{ "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
		{ "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
		{ "", 0, 0, 0, 0 },
		};

		#define PM_DBG_MAX_REG_SETS 4

		static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];

		static int pm_dbg_get_regset_size(void)
		{
		static int regset_size;

		if (regset_size == 0) {
		int i = 0;

		while (pm_dbg_reg_modules[i].name[0] != 0) {
		regset_size += pm_dbg_reg_modules[i].high +
		4 - pm_dbg_reg_modules[i].low;
		i++;
		}
		}
		return regset_size;
		}

		static int pm_dbg_show_regs(struct seq_file s, void unused)
		{
		int i, j;
		unsigned long val;
		int reg_set = (int)s->private;
		u32 *ptr;
		void *store = NULL;
		int regs;
		int linefeed;

		if (reg_set == 0) {
		store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
		ptr = store;
		pm_dbg_regset_store(ptr);
		} else {
		ptr = pm_dbg_reg_set[reg_set - 1];
		}

		i = 0;

		while (pm_dbg_reg_modules[i].name[0] != 0) {
		regs = 0;
		linefeed = 0;
		if (pm_dbg_reg_modules[i].type == MOD_CM)
		seq_printf(s, "MOD: CM_%s (%08x)\n",
		pm_dbg_reg_modules[i].name,
		(u32)(OMAP3430_CM_BASE +
		pm_dbg_reg_modules[i].offset));
		else
		seq_printf(s, "MOD: PRM_%s (%08x)\n",
		pm_dbg_reg_modules[i].name,
		(u32)(OMAP3430_PRM_BASE +
		pm_dbg_reg_modules[i].offset));

		for (j = pm_dbg_reg_modules[i].low;
		j <= pm_dbg_reg_modules[i].high; j += 4) {
		val = *(ptr++);
		if (val != 0) {
		regs++;
		if (linefeed) {
		seq_printf(s, "\n");
		linefeed = 0;
		}
		seq_printf(s, " %02x => %08lx", j, val);
		if (regs % 4 == 0)
		linefeed = 1;
		}
		}
		seq_printf(s, "\n");
		i++;
		}

		if (store != NULL)
		kfree(store);

		return 0;
		}

		static void pm_dbg_regset_store(u32 *ptr)
		{
		int i, j;
		u32 val;

		i = 0;

		while (pm_dbg_reg_modules[i].name[0] != 0) {
		for (j = pm_dbg_reg_modules[i].low;
		j <= pm_dbg_reg_modules[i].high; j += 4) {
		if (pm_dbg_reg_modules[i].type == MOD_CM)
		val = cm_read_mod_reg(
		pm_dbg_reg_modules[i].offset, j);
		else
		val = prm_read_mod_reg(
		pm_dbg_reg_modules[i].offset, j);
		*(ptr++) = val;
		}
		i++;
		}
		}

		int pm_dbg_regset_save(int reg_set)
		{
		if (pm_dbg_reg_set[reg_set-1] == NULL)
		return -EINVAL;

		pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);

		return 0;
		}

		static const char pwrdm_state_names[][4] = {
		"OFF",
		"RET",
		"INA",
		"ON"
		};

		void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
		{
		s64 t;

		if (!pm_dbg_init_done)
		return ;

		/* Update timer for previous state */
		t = sched_clock();

		pwrdm->state_timer[prev] += t - pwrdm->timer;

		pwrdm->timer = t;
		}

		static int clkdm_dbg_show_counter(struct clockdomain clkdm, void user)
		{
		struct seq_file s = (struct seq_file )user;

		if (strcmp(clkdm->name, "emu_clkdm") == 0 \|\|
		strcmp(clkdm->name, "wkup_clkdm") == 0 \|\|
		strncmp(clkdm->name, "dpll", 4) == 0)
		return 0;

		seq_printf(s, "%s->%s (%d)", clkdm->name,
		clkdm->pwrdm.ptr->name,
		atomic_read(&clkdm->usecount));
		seq_printf(s, "\n");

		return 0;
		}

		static int pwrdm_dbg_show_counter(struct powerdomain pwrdm, void user)
		{
		struct seq_file s = (struct seq_file )user;
		int i;

		if (strcmp(pwrdm->name, "emu_pwrdm") == 0 \|\|
		strcmp(pwrdm->name, "wkup_pwrdm") == 0 \|\|
		strncmp(pwrdm->name, "dpll", 4) == 0)
		return 0;

		if (pwrdm->state != pwrdm_read_pwrst(pwrdm))
		printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n",
		pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm));

		seq_printf(s, "%s (%s)", pwrdm->name,
		pwrdm_state_names[pwrdm->state]);
		for (i = 0; i < 4; i++)
		seq_printf(s, ",%s:%d", pwrdm_state_names[i],
		pwrdm->state_counter[i]);

		seq_printf(s, "\n");

		return 0;
		}

		static int pwrdm_dbg_show_timer(struct powerdomain pwrdm, void user)
		{
		struct seq_file s = (struct seq_file )user;
		int i;

		if (strcmp(pwrdm->name, "emu_pwrdm") == 0 \|\|
		strcmp(pwrdm->name, "wkup_pwrdm") == 0 \|\|
		strncmp(pwrdm->name, "dpll", 4) == 0)
		return 0;

		pwrdm_state_switch(pwrdm);

		seq_printf(s, "%s (%s)", pwrdm->name,
		pwrdm_state_names[pwrdm->state]);

		for (i = 0; i < 4; i++)
		seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
		pwrdm->state_timer[i]);

		seq_printf(s, "\n");
		return 0;
		}

		static int pm_dbg_show_counters(struct seq_file s, void unused)
		{
		pwrdm_for_each(pwrdm_dbg_show_counter, s);
		clkdm_for_each(clkdm_dbg_show_counter, s);

		return 0;
		}

		static int pm_dbg_show_timers(struct seq_file s, void unused)
		{
		pwrdm_for_each(pwrdm_dbg_show_timer, s);
		return 0;
		}

		static int pm_dbg_open(struct inode inode, struct file file)
		{
		switch ((int)inode->i_private) {
		case DEBUG_FILE_COUNTERS:
		return single_open(file, pm_dbg_show_counters,
		&inode->i_private);
		case DEBUG_FILE_TIMERS:
		default:
		return single_open(file, pm_dbg_show_timers,
		&inode->i_private);
		};
		}

		static int pm_dbg_reg_open(struct inode inode, struct file file)
		{
		return single_open(file, pm_dbg_show_regs, inode->i_private);
		}

		static const struct file_operations debug_fops = {
		.open = pm_dbg_open,
		.read = seq_read,
		.llseek = seq_lseek,
		.release = single_release,
		};

		static const struct file_operations debug_reg_fops = {
		.open = pm_dbg_reg_open,
		.read = seq_read,
		.llseek = seq_lseek,
		.release = single_release,
		};

		int pm_dbg_regset_init(int reg_set)
		{
		char name[2];

		if (!pm_dbg_init_done)
		pm_dbg_init();

		if (reg_set < 1 \|\| reg_set > PM_DBG_MAX_REG_SETS \|\|
		pm_dbg_reg_set[reg_set-1] != NULL)
		return -EINVAL;

		pm_dbg_reg_set[reg_set-1] =
		kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);

		if (pm_dbg_reg_set[reg_set-1] == NULL)
		return -ENOMEM;

		if (pm_dbg_dir != NULL) {
		sprintf(name, "%d", reg_set);

		(void) debugfs_create_file(name, S_IRUGO,
		pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
		}

		return 0;
		}

		static int pwrdm_suspend_get(void data, u64 val)
		{
		val = omap3_pm_get_suspend_state((struct powerdomain )data);

		if (*val >= 0)
		return 0;
		return *val;
		}

		static int pwrdm_suspend_set(void *data, u64 val)
		{
		return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val);
		}

		DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get,
		pwrdm_suspend_set, "%llu\n");

		static int __init pwrdms_setup(struct powerdomain pwrdm, void dir)
		{
		int i;
		s64 t;
		struct dentry *d;

		t = sched_clock();

		for (i = 0; i < 4; i++)
		pwrdm->state_timer[i] = 0;

		pwrdm->timer = t;

		if (strncmp(pwrdm->name, "dpll", 4) == 0)
		return 0;

		d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);

		(void) debugfs_create_file("suspend", S_IRUGO\|S_IWUSR, d,
		(void *)pwrdm, &pwrdm_suspend_fops);

		return 0;
		}

		static int __init pm_dbg_init(void)
		{
		int i;
		struct dentry *d;
		char name[2];

		if (pm_dbg_init_done)
		return 0;

		if (cpu_is_omap34xx())
		pm_dbg_reg_modules = omap3_pm_reg_modules;
		else {
		printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
		return -ENODEV;
		}

		d = debugfs_create_dir("pm_debug", NULL);
		if (IS_ERR(d))
		return PTR_ERR(d);

		(void) debugfs_create_file("count", S_IRUGO,
		d, (void *)DEBUG_FILE_COUNTERS, &debug_fops);
		(void) debugfs_create_file("time", S_IRUGO,
		d, (void *)DEBUG_FILE_TIMERS, &debug_fops);

		pwrdm_for_each(pwrdms_setup, (void *)d);

		pm_dbg_dir = debugfs_create_dir("registers", d);
		if (IS_ERR(pm_dbg_dir))
		return PTR_ERR(pm_dbg_dir);

		(void) debugfs_create_file("current", S_IRUGO,
		pm_dbg_dir, (void *)0, &debug_reg_fops);

		for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
		if (pm_dbg_reg_set[i] != NULL) {
		sprintf(name, "%d", i+1);
		(void) debugfs_create_file(name, S_IRUGO,
		pm_dbg_dir, (void *)(i+1), &debug_reg_fops);

		}

		pm_dbg_init_done = 1;

		return 0;
		}
		arch_initcall(pm_dbg_init);

		#else
		void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
		#endif

arch/arm/mach-omap2/pm.h

+11 −0

Original line number	Diff line number	Diff line
		@@ -11,12 +11,23 @@
		#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
		#define __ARCH_ARM_MACH_OMAP2_PM_H

		#include <mach/powerdomain.h>

		extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
		extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);

		#ifdef CONFIG_PM_DEBUG
		extern void omap2_pm_dump(int mode, int resume, unsigned int us);
		extern int omap2_pm_debug;
		extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
		extern int pm_dbg_regset_save(int reg_set);
		extern int pm_dbg_regset_init(int reg_set);
		#else
		#define omap2_pm_dump(mode, resume, us) do {} while (0);
		#define omap2_pm_debug 0
		#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
		#define pm_dbg_regset_save(reg_set) do {} while (0);
		#define pm_dbg_regset_init(reg_set) do {} while (0);
		#endif /* CONFIG_PM_DEBUG */

		extern void omap24xx_idle_loop_suspend(void);

arch/arm/mach-omap2/pm24xx.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = {
		.valid = suspend_valid_only_mem,
		};

		static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm)
		static int _pm_clkdm_enable_hwsup(struct clockdomain clkdm, void unused)
		{
		omap2_clkdm_allow_idle(clkdm);
		return 0;
		@@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void)
		omap2_clkdm_sleep(gfx_clkdm);

		/* Enable clockdomain hardware-supervised control for all clkdms */
		clkdm_for_each(_pm_clkdm_enable_hwsup);
		clkdm_for_each(_pm_clkdm_enable_hwsup, NULL);

		/* Enable clock autoidle for all domains */
		cm_write_mod_reg(OMAP24XX_AUTO_CAM \|