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Commit 55392c4c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer updates from Thomas Gleixner:
 "This update provides the following changes:

   - The rework of the timer wheel which addresses the shortcomings of
     the current wheel (cascading, slow search for next expiring timer,
     etc).  That's the first major change of the wheel in almost 20
     years since Finn implemted it.

   - A large overhaul of the clocksource drivers init functions to
     consolidate the Device Tree initialization

   - Some more Y2038 updates

   - A capability fix for timerfd

   - Yet another clock chip driver

   - The usual pile of updates, comment improvements all over the place"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (130 commits)
  tick/nohz: Optimize nohz idle enter
  clockevents: Make clockevents_subsys static
  clocksource/drivers/time-armada-370-xp: Fix return value check
  timers: Implement optimization for same expiry time in mod_timer()
  timers: Split out index calculation
  timers: Only wake softirq if necessary
  timers: Forward the wheel clock whenever possible
  timers/nohz: Remove pointless tick_nohz_kick_tick() function
  timers: Optimize collect_expired_timers() for NOHZ
  timers: Move __run_timers() function
  timers: Remove set_timer_slack() leftovers
  timers: Switch to a non-cascading wheel
  timers: Reduce the CPU index space to 256k
  timers: Give a few structs and members proper names
  hlist: Add hlist_is_singular_node() helper
  signals: Use hrtimer for sigtimedwait()
  timers: Remove the deprecated mod_timer_pinned() API
  timers, net/ipv4/inet: Initialize connection request timers as pinned
  timers, drivers/tty/mips_ejtag: Initialize the poll timer as pinned
  timers, drivers/tty/metag_da: Initialize the poll timer as pinned
  ...
parents c410614c 1f3b0f82
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+17 −0
Original line number Diff line number Diff line
Oxford Semiconductor OXNAS SoCs Family RPS Timer
================================================

Required properties:
- compatible: Should be "oxsemi,ox810se-rps-timer"
- reg : Specifies base physical address and size of the registers.
- interrupts : The interrupts of the two timers
- clocks : The phandle of the timer clock source

example:

timer0: timer@200 {
	compatible = "oxsemi,ox810se-rps-timer";
	reg = <0x200 0x40>;
	clocks = <&rpsclk>;
	interrupts = <4 5>;
};
+4 −2
Original line number Diff line number Diff line
Rockchip rk3288 timer
Rockchip rk timer

Required properties:
- compatible: shall be "rockchip,rk3288-timer"
- compatible: shall be one of:
  "rockchip,rk3288-timer" - for rk3066, rk3036, rk3188, rk322x, rk3288, rk3368
  "rockchip,rk3399-timer" - for rk3399
- reg: base address of the timer register starting with TIMERS CONTROL register
- interrupts: should contain the interrupts for Timer0
- clocks : must contain an entry for each entry in clock-names
+8 −0
Original line number Diff line number Diff line
@@ -687,6 +687,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
			[SPARC64] tick
			[X86-64] hpet,tsc

	clocksource.arm_arch_timer.evtstrm=
			[ARM,ARM64]
			Format: <bool>
			Enable/disable the eventstream feature of the ARM
			architected timer so that code using WFE-based polling
			loops can be debugged more effectively on production
			systems.

	clearcpuid=BITNUM [X86]
			Disable CPUID feature X for the kernel. See
			arch/x86/include/asm/cpufeatures.h for the valid bit
+39 −24
Original line number Diff line number Diff line
@@ -116,19 +116,19 @@ static struct clocksource arc_counter_gfrc = {
	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
};

static void __init arc_cs_setup_gfrc(struct device_node *node)
static int __init arc_cs_setup_gfrc(struct device_node *node)
{
	int exists = cpuinfo_arc700[0].extn.gfrc;
	int ret;

	if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
		return;
		return -ENXIO;

	ret = arc_get_timer_clk(node);
	if (ret)
		return;
		return ret;

	clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
	return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
}
CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);

@@ -172,25 +172,25 @@ static struct clocksource arc_counter_rtc = {
	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
};

static void __init arc_cs_setup_rtc(struct device_node *node)
static int __init arc_cs_setup_rtc(struct device_node *node)
{
	int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
	int ret;

	if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
		return;
		return -ENXIO;

	/* Local to CPU hence not usable in SMP */
	if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
		return;
		return -EINVAL;

	ret = arc_get_timer_clk(node);
	if (ret)
		return;
		return ret;

	write_aux_reg(AUX_RTC_CTRL, 1);

	clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
	return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
}
CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);

@@ -213,23 +213,23 @@ static struct clocksource arc_counter_timer1 = {
	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
};

static void __init arc_cs_setup_timer1(struct device_node *node)
static int __init arc_cs_setup_timer1(struct device_node *node)
{
	int ret;

	/* Local to CPU hence not usable in SMP */
	if (IS_ENABLED(CONFIG_SMP))
		return;
		return -EINVAL;

	ret = arc_get_timer_clk(node);
	if (ret)
		return;
		return ret;

	write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
	write_aux_reg(ARC_REG_TIMER1_CNT, 0);
	write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);

	clocksource_register_hz(&arc_counter_timer1, arc_timer_freq);
	return clocksource_register_hz(&arc_counter_timer1, arc_timer_freq);
}

/********** Clock Event Device *********/
@@ -324,20 +324,28 @@ static struct notifier_block arc_timer_cpu_nb = {
/*
 * clockevent setup for boot CPU
 */
static void __init arc_clockevent_setup(struct device_node *node)
static int __init arc_clockevent_setup(struct device_node *node)
{
	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
	int ret;

	register_cpu_notifier(&arc_timer_cpu_nb);
	ret = register_cpu_notifier(&arc_timer_cpu_nb);
	if (ret) {
		pr_err("Failed to register cpu notifier");
		return ret;
	}

	arc_timer_irq = irq_of_parse_and_map(node, 0);
	if (arc_timer_irq <= 0)
		panic("clockevent: missing irq");
	if (arc_timer_irq <= 0) {
		pr_err("clockevent: missing irq");
		return -EINVAL;
	}

	ret = arc_get_timer_clk(node);
	if (ret)
		panic("clockevent: missing clk");
	if (ret) {
		pr_err("clockevent: missing clk");
		return ret;
	}

	evt->irq = arc_timer_irq;
	evt->cpumask = cpumask_of(smp_processor_id());
@@ -347,22 +355,29 @@ static void __init arc_clockevent_setup(struct device_node *node)
	/* Needs apriori irq_set_percpu_devid() done in intc map function */
	ret = request_percpu_irq(arc_timer_irq, timer_irq_handler,
				 "Timer0 (per-cpu-tick)", evt);
	if (ret)
		panic("clockevent: unable to request irq\n");
	if (ret) {
		pr_err("clockevent: unable to request irq\n");
		return ret;
	}

	enable_percpu_irq(arc_timer_irq, 0);

	return 0;
}

static void __init arc_of_timer_init(struct device_node *np)
static int __init arc_of_timer_init(struct device_node *np)
{
	static int init_count = 0;
	int ret;

	if (!init_count) {
		init_count = 1;
		arc_clockevent_setup(np);
		ret = arc_clockevent_setup(np);
	} else {
		arc_cs_setup_timer1(np);
		ret = arc_cs_setup_timer1(np);
	}

	return ret;
}
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);

+1 −1
Original line number Diff line number Diff line
@@ -358,10 +358,10 @@ config ARCH_CLPS711X
	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
	select ARCH_REQUIRE_GPIOLIB
	select AUTO_ZRELADDR
	select CLKSRC_MMIO
	select COMMON_CLK
	select CPU_ARM720T
	select GENERIC_CLOCKEVENTS
	select CLPS711X_TIMER
	select MFD_SYSCON
	select SOC_BUS
	help
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