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Commit 552d2f84 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] vpe: Add missing "space"
  [MIPS] Compliment va_start() with va_end().
  [MIPS] IP22: Fix broken eeprom access by using __raw_readl/__raw_writel
  [MIPS] IP22: Fix broken EISA interrupt setup by switching to generic i8259
  [MIPS] 64-bit Sibyte kernels need DMA32.
  [MIPS] Only build r4k clocksource for systems that work ok with it.
  [MIPS] Handle R4000/R4400 mfc0 from count register.
  [MIPS] Fix possible hang in LL/SC futex loops.
  [MIPS] Fix context DSP context / TLS pointer switching bug for new threads.
  [MIPS] IP32: More interrupt renumbering fixes.
  [MIPS] time: MIPSsim's plat_time_init doesn't need to be irq safe.
  [MIPS] time: Fix negated condition in cevt-r4k driver.
  [MIPS] Fix pcspeaker build.
parents 09cfd929 b1e3afa0
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+33 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ config MACH_ALCHEMY
config BASLER_EXCITE
	bool "Basler eXcite smart camera"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_COHERENT
	select HW_HAS_PCI
	select IRQ_CPU
@@ -49,6 +50,7 @@ config BASLER_EXCITE_PROTOTYPE
config BCM47XX
	bool "BCM47XX based boards"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select HW_HAS_PCI
	select IRQ_CPU
@@ -66,6 +68,7 @@ config BCM47XX
config MIPS_COBALT
	bool "Cobalt Server"
	select CEVT_R4K
	select CSRC_R4K
	select CEVT_GT641XX
	select DMA_NONCOHERENT
	select HW_HAS_PCI
@@ -85,6 +88,7 @@ config MACH_DECSTATION
	bool "DECstations"
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select NO_IOPORT
	select IRQ_CPU
@@ -117,6 +121,7 @@ config MACH_JAZZ
	select ARC32
	select ARCH_MAY_HAVE_PC_FDC
	select CEVT_R4K
	select CSRC_R4K
	select GENERIC_ISA_DMA
	select IRQ_CPU
	select I8253
@@ -137,6 +142,7 @@ config MACH_JAZZ
config LASAT
	bool "LASAT Networks platforms"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select SYS_HAS_EARLY_PRINTK
	select HW_HAS_PCI
@@ -154,6 +160,7 @@ config LEMOTE_FULONG
	bool "Lemote Fulong mini-PC"
	select ARCH_SPARSEMEM_ENABLE
	select CEVT_R4K
	select CSRC_R4K
	select SYS_HAS_CPU_LOONGSON2
	select DMA_NONCOHERENT
	select BOOT_ELF32
@@ -179,6 +186,7 @@ config MIPS_ATLAS
	bool "MIPS Atlas board"
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select SYS_HAS_EARLY_PRINTK
	select IRQ_CPU
@@ -210,6 +218,7 @@ config MIPS_MALTA
	select ARCH_MAY_HAVE_PC_FDC
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select GENERIC_ISA_DMA
	select IRQ_CPU
@@ -241,6 +250,7 @@ config MIPS_MALTA
config MIPS_SEAD
	bool "MIPS SEAD board"
	select CEVT_R4K
	select CSRC_R4K
	select IRQ_CPU
	select DMA_NONCOHERENT
	select SYS_HAS_EARLY_PRINTK
@@ -260,6 +270,7 @@ config MIPS_SEAD
config MIPS_SIM
	bool 'MIPS simulator (MIPSsim)'
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select SYS_HAS_EARLY_PRINTK
	select IRQ_CPU
@@ -278,6 +289,7 @@ config MIPS_SIM
config MARKEINS
	bool "NEC EMMA2RH Mark-eins"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select HW_HAS_PCI
	select IRQ_CPU
@@ -293,6 +305,7 @@ config MARKEINS
config MACH_VR41XX
	bool "NEC VR4100 series based machines"
	select CEVT_R4K
	select CSRC_R4K
	select SYS_HAS_CPU_VR41XX
	select GENERIC_HARDIRQS_NO__DO_IRQ

@@ -330,6 +343,7 @@ config PMC_MSP
config PMC_YOSEMITE
	bool "PMC-Sierra Yosemite eval board"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_COHERENT
	select HW_HAS_PCI
	select IRQ_CPU
@@ -351,6 +365,7 @@ config PMC_YOSEMITE
config QEMU
	bool "Qemu"
	select CEVT_R4K
	select CSRC_R4K
	select DMA_COHERENT
	select GENERIC_ISA_DMA
	select HAVE_STD_PC_SERIAL_PORT
@@ -382,9 +397,11 @@ config SGI_IP22
	select ARC32
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select HW_HAS_EISA
	select I8253
	select I8259
	select IP22_CPU_SCACHE
	select IRQ_CPU
	select GENERIC_ISA_DMA_SUPPORT_BROKEN
@@ -427,6 +444,7 @@ config SGI_IP32
	select ARC32
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select HW_HAS_PCI
	select IRQ_CPU
@@ -498,6 +516,7 @@ config SIBYTE_SWARM
	select SYS_SUPPORTS_HIGHMEM
	select SYS_SUPPORTS_KGDB
	select SYS_SUPPORTS_LITTLE_ENDIAN
	select ZONE_DMA32 if 64BIT

config SIBYTE_LITTLESUR
	bool "Sibyte BCM91250C2-LittleSur"
@@ -548,6 +567,7 @@ config SIBYTE_BIGSUR
	select SYS_SUPPORTS_BIG_ENDIAN
	select SYS_SUPPORTS_HIGHMEM
	select SYS_SUPPORTS_LITTLE_ENDIAN
	select ZONE_DMA32 if 64BIT

config SNI_RM
	bool "SNI RM200/300/400"
@@ -556,6 +576,7 @@ config SNI_RM
	select ARCH_MAY_HAVE_PC_FDC
	select BOOT_ELF32
	select CEVT_R4K
	select CSRC_R4K
	select DMA_NONCOHERENT
	select GENERIC_ISA_DMA
	select HW_HAS_EISA
@@ -599,6 +620,7 @@ config TOSHIBA_JMR3927
config TOSHIBA_RBTX4927
	bool "Toshiba RBTX49[23]7 board"
	select CEVT_R4K
	select CSRC_R4K
	select CEVT_TXX9
	select DMA_NONCOHERENT
	select HAS_TXX9_SERIAL
@@ -621,6 +643,7 @@ config TOSHIBA_RBTX4927
config TOSHIBA_RBTX4938
	bool "Toshiba RBTX4938 board"
	select CEVT_R4K
	select CSRC_R4K
	select CEVT_TXX9
	select DMA_NONCOHERENT
	select HAS_TXX9_SERIAL
@@ -642,6 +665,7 @@ config TOSHIBA_RBTX4938
config WR_PPMC
	bool "Wind River PPMC board"
	select CEVT_R4K
	select CSRC_R4K
	select IRQ_CPU
	select BOOT_ELF32
	select DMA_NONCOHERENT
@@ -752,6 +776,9 @@ config CEVT_TXX9
config CSRC_BCM1480
	bool

config CSRC_R4K
	bool

config CSRC_SB1250
	bool

@@ -1640,6 +1667,9 @@ config ARCH_DISCONTIGMEM_ENABLE
	  or have huge holes in the physical address space for other reasons.
	  See <file:Documentation/vm/numa> for more.

config ARCH_POPULATES_NODE_MAP
	def_bool y

config ARCH_SPARSEMEM_ENABLE
	bool
	select SPARSEMEM_STATIC
@@ -1945,6 +1975,9 @@ config I8253
config PCSPEAKER
	bool

config ZONE_DMA32
	bool

source "drivers/pcmcia/Kconfig"

source "drivers/pci/hotplug/Kconfig"
+1 −0
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@ config SOC_AU1X00
	bool
	select 64BIT_PHYS_ADDR
	select CEVT_R4K
	select CSRC_R4K
	select IRQ_CPU
	select SYS_HAS_CPU_MIPS32_R1
	select SYS_SUPPORTS_32BIT_KERNEL
+2 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o
obj-$(CONFIG_CEVT_SB1250)	+= cevt-sb1250.o
obj-$(CONFIG_CEVT_TXX9)		+= cevt-txx9.o
obj-$(CONFIG_CSRC_BCM1480)	+= csrc-bcm1480.o
obj-$(CONFIG_CSRC_R4K)		+= csrc-r4k.o
obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o

binfmt_irix-objs	:= irixelf.o irixinv.o irixioctl.o irixsig.o	\
@@ -43,6 +44,7 @@ obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_VR41XX)	+= r4k_fpu.o r4k_switch.o

obj-$(CONFIG_SMP)		+= smp.o
obj-$(CONFIG_SMP_UP)		+= smp-up.o

obj-$(CONFIG_MIPS_MT)		+= mips-mt.o
obj-$(CONFIG_MIPS_MT_FPAFF)	+= mips-mt-fpaff.o
+8 −6
Original line number Diff line number Diff line
@@ -219,7 +219,7 @@ static int c0_compare_int_usable(void)
	return 1;
}

void __cpuinit mips_clockevent_init(void)
int __cpuinit mips_clockevent_init(void)
{
	uint64_t mips_freq = mips_hpt_frequency;
	unsigned int cpu = smp_processor_id();
@@ -227,7 +227,7 @@ void __cpuinit mips_clockevent_init(void)
	unsigned int irq;

	if (!cpu_has_counter || !mips_hpt_frequency)
		return;
		return -ENXIO;

#ifdef CONFIG_MIPS_MT_SMTC
	setup_smtc_dummy_clockevent_device();
@@ -237,11 +237,11 @@ void __cpuinit mips_clockevent_init(void)
	 * device.
	 */
	if (cpu)
		return;
		return 0;
#endif

	if (!c0_compare_int_usable())
		return;
		return -ENXIO;

	/*
	 * With vectored interrupts things are getting platform specific.
@@ -276,8 +276,8 @@ void __cpuinit mips_clockevent_init(void)

	clockevents_register_device(cd);

	if (!cp0_timer_irq_installed)
		return;
	if (cp0_timer_irq_installed)
		return 0;

	cp0_timer_irq_installed = 1;

@@ -287,4 +287,6 @@ void __cpuinit mips_clockevent_init(void)
#else
	setup_irq(irq, &c0_compare_irqaction);
#endif

	return 0;
}
+29 −0
Original line number Diff line number Diff line
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2007 by Ralf Baechle
 */

static cycle_t c0_hpt_read(void)
{
	return read_c0_count();
}

static struct clocksource clocksource_mips = {
	.name		= "MIPS",
	.read		= c0_hpt_read,
	.mask		= CLOCKSOURCE_MASK(32),
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};

static void __init init_mips_clocksource(void)
{
	/* Calclate a somewhat reasonable rating value */
	clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;

	clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);

	clocksource_register(&clocksource_mips);
}
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