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Unverified Commit 54aed4dd authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Paul Burton
Browse files

MIPS: IP27: use dma_direct_ops 



IP27 is coherent and has a reasonably direct mapping, just with a little
per-bus offset added into the dma address.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Patchwork: https://patchwork.linux-mips.org/patch/19542/


Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org
parent dffbfde7

arch/mips/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -683,11 +683,11 @@ config SGI_IP22 


config SGI_IP27

	bool "SGI IP27 (Origin200/2000)"

	select ARCH_HAS_PHYS_TO_DMA

	select FW_ARC

	select FW_ARC64

	select BOOT_ELF64

	select DEFAULT_SGI_PARTITION

	select MIPS_DMA_DEFAULT

	select SYS_HAS_EARLY_PRINTK

	select HW_HAS_PCI

	select NR_CPUS_DEFAULT_64

arch/mips/include/asm/mach-ip27/dma-coherence.h

deleted100644 → 0
+0 −70
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2006  Ralf Baechle <ralf@linux-mips.org>

 *

 */

#ifndef __ASM_MACH_IP27_DMA_COHERENCE_H

#define __ASM_MACH_IP27_DMA_COHERENCE_H



#include <asm/pci/bridge.h>



#define pdev_to_baddr(pdev, addr) \

	(BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr))

#define dev_to_baddr(dev, addr) \

	pdev_to_baddr(to_pci_dev(dev), (addr))



struct device;



static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,

	size_t size)

{

	dma_addr_t pa = dev_to_baddr(dev, virt_to_phys(addr));



	return pa;

}



static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,

	struct page *page)

{

	dma_addr_t pa = dev_to_baddr(dev, page_to_phys(page));



	return pa;

}



static inline unsigned long plat_dma_addr_to_phys(struct device *dev,

	dma_addr_t dma_addr)

{

	return dma_addr & ~(0xffUL << 56);

}



static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,

	size_t size, enum dma_data_direction direction)

{

}



static inline int plat_dma_supported(struct device *dev, u64 mask)

{

	/*

	 * we fall back to GFP_DMA when the mask isn't all 1s,

	 * so we can't guarantee allocations that must be

	 * within a tighter range than GFP_DMA..

	 */

	if (mask < DMA_BIT_MASK(24))

		return 0;



	return 1;

}



static inline void plat_post_dma_flush(struct device *dev)

{

}



static inline int plat_device_is_coherent(struct device *dev)

{

	return 1;		/* IP27 non-coherent mode is unsupported */

}



#endif /* __ASM_MACH_IP27_DMA_COHERENCE_H */

arch/mips/pci/pci-ip27.c

+14 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/export.h>

#include <linux/pci.h>

#include <linux/smp.h>

#include <linux/dma-direct.h>

#include <asm/sn/arch.h>

#include <asm/pci/bridge.h>

#include <asm/paccess.h>
@@ -182,6 +183,19 @@ int pcibios_plat_dev_init(struct pci_dev *dev) 
	return 0;

}



dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)

{

	struct pci_dev *pdev = to_pci_dev(dev);

	struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);



	return bc->baddr + paddr;

}



phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t dma_addr)

{

	return dma_addr & ~(0xffUL << 56);

}



/*

 * Device might live on a subordinate PCI bus.	XXX Walk up the chain of buses

 * to find the slot number in sense of the bridge device register.