Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 535b1100 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-renesas-for-v4.14-tag1' of... 

Merge tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull Renesas clk driver updates from Geert Uytterhoeven:

  * Add more module clocks for R-Car V2H and M3-W,
  * Add support for the R-Car Gen3 USB 2.0 clock selector PHY,
  * Add support for the new R-Car D3 SoC,
  * Allow compile-testing of all (sub)drivers now all dummy infrastructure
    is available,
  * Small fixes and cleanups.

* tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r8a7796: Add USB3.0 clock
  clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY
  clk: renesas: cpg-mssr: Add R8A77995 support
  clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks
  clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3
  clk: renesas: Add r8a77995 CPG Core Clock Definitions
  clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div table
  clk: renesas: rcar-gen3-cpg: Drop superfluous variable
  clk: renesas: Allow compile-testing of all (sub)drivers
  clk: renesas: r8a7792: Add IMR-LX3/LSX3 clocks
  clk: renesas: div6: Document fields used for parent selection
parents 1dfcfa72 c29f8295

Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt

+2 −1
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ Required Properties: 
      - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)

      - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)

      - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)

      - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)



  - reg: Base address and length of the memory resource used by the CPG/MSSR

    block
@@ -30,7 +31,7 @@ Required Properties: 
    clock-names

  - clock-names: List of external parent clock names. Valid names are:

      - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,

		 r8a7795, r8a7796)

		 r8a7795, r8a7796, r8a77995)

      - "extalr" (r8a7795, r8a7796)

      - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)

Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.txt

0 → 100644
+55 −0
Original line number Diff line number Diff line 
* Renesas R-Car USB 2.0 clock selector



This file provides information on what the device node for the R-Car USB 2.0

clock selector.



If you connect an external clock to the USB_EXTAL pin only, you should set

the clock rate to "usb_extal" node only.

If you connect an oscillator to both the USB_XTAL and USB_EXTAL, this module

is not needed because this is default setting. (Of course, you can set the

clock rates to both "usb_extal" and "usb_xtal" nodes.



Case 1: An external clock connects to R-Car SoC

	+----------+   +--- R-Car ---------------------+

	|External  |---|USB_EXTAL ---> all usb channels|

	|clock     |   |USB_XTAL                       |

	+----------+   +-------------------------------+

In this case, we need this driver with "usb_extal" clock.



Case 2: An oscillator connects to R-Car SoC

	+----------+   +--- R-Car ---------------------+

	|Oscillator|---|USB_EXTAL -+-> all usb channels|

	|          |---|USB_XTAL --+                   |

	+----------+   +-------------------------------+

In this case, we don't need this selector.



Required properties:

- compatible: "renesas,r8a7795-rcar-usb2-clock-sel" if the device is a part of

	      an R8A7795 SoC.

	      "renesas,r8a7796-rcar-usb2-clock-sel" if the device if a part of

	      an R8A7796 SoC.

	      "renesas,rcar-gen3-usb2-clock-sel" for a generic R-Car Gen3

	      compatible device.



	      When compatible with the generic version, nodes must list the

	      SoC-specific version corresponding to the platform first

	      followed by the generic version.



- reg: offset and length of the USB 2.0 clock selector register block.

- clocks: A list of phandles and specifier pairs.

- clock-names: Name of the clocks.

 - The functional clock must be "ehci_ohci"

 - The USB_EXTAL clock pin must be "usb_extal"

 - The USB_XTAL clock pin must be "usb_xtal"

- #clock-cells: Must be 0



Example (R-Car H3):



	usb2_clksel: clock-controller@e6590630 {

		compatible = "renesas,r8a77950-rcar-usb2-clock-sel",

			     "renesas,rcar-gen3-usb2-clock-sel";

		reg = <0 0xe6590630 0 0x02>;

		clocks = <&cpg CPG_MOD 703>, <&usb_extal>, <&usb_xtal>;

		clock-names = "ehci_ohci", "usb_extal", "usb_xtal";

		#clock-cells = <0>;

	};

drivers/clk/renesas/Kconfig

+29 −19
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ config CLK_RENESAS 
	select CLK_R8A7794 if ARCH_R8A7794

	select CLK_R8A7795 if ARCH_R8A7795

	select CLK_R8A7796 if ARCH_R8A7796

	select CLK_R8A77995 if ARCH_R8A77995

	select CLK_SH73A0 if ARCH_SH73A0



if CLK_RENESAS
@@ -34,94 +35,103 @@ config CLK_EMEV2 
	bool "Emma Mobile EV2 clock support" if COMPILE_TEST



config CLK_RZA1

	bool

	bool "RZ/A1H clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP



config CLK_R8A73A4

	bool

	bool "R-Mobile APE6 clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6



config CLK_R8A7740

	bool

	bool "R-Mobile A1 clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6



config CLK_R8A7743

	bool

	bool "RZ/G1M clock support" if COMPILE_TEST

	select CLK_RCAR_GEN2_CPG



config CLK_R8A7745

	bool

	bool "RZ/G1E clock support" if COMPILE_TEST

	select CLK_RCAR_GEN2_CPG



config CLK_R8A7778

	bool

	bool "R-Car M1A clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP



config CLK_R8A7779

	bool

	bool "R-Car H1 clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP



config CLK_R8A7790

	bool

	bool "R-Car H2 clock support" if COMPILE_TEST

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG

	select CLK_RENESAS_DIV6



config CLK_R8A7791

	bool

	bool "R-Car M2-W/N clock support" if COMPILE_TEST

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG

	select CLK_RENESAS_DIV6



config CLK_R8A7792

	bool

	bool "R-Car V2H clock support" if COMPILE_TEST

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG



config CLK_R8A7794

	bool

	bool "R-Car E2 clock support" if COMPILE_TEST

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG

	select CLK_RENESAS_DIV6



config CLK_R8A7795

	bool

	bool "R-Car H3 clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_R8A7796

	bool

	bool "R-Car M3-W clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_R8A77995

	bool "R-Car D3 clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_SH73A0

	bool

	bool "SH-Mobile AG5 clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6





# Family

config CLK_RCAR_GEN2

	bool

	bool "R-Car Gen2 legacy clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6



config CLK_RCAR_GEN2_CPG

	bool

	bool "R-Car Gen2 CPG clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSSR



config CLK_RCAR_GEN3_CPG

	bool

	bool "R-Car Gen3 CPG clock support" if COMPILE_TEST

	select CLK_RENESAS_CPG_MSSR



config CLK_RCAR_USB2_CLOCK_SEL

	bool "Renesas R-Car USB2 clock selector support"

	depends on ARCH_RENESAS || COMPILE_TEST

	help

	  This is a driver for R-Car USB2 clock selector



# Generic

config CLK_RENESAS_CPG_MSSR

	bool

	bool "CPG/MSSR clock support" if COMPILE_TEST

	select CLK_RENESAS_DIV6



config CLK_RENESAS_CPG_MSTP

	bool

	bool "MSTP clock support" if COMPILE_TEST



config CLK_RENESAS_DIV6

	bool "DIV6 clock support" if COMPILE_TEST

drivers/clk/renesas/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -13,12 +13,14 @@ obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o 
obj-$(CONFIG_CLK_R8A7794)		+= r8a7794-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7795)		+= r8a7795-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7796)		+= r8a7796-cpg-mssr.o

obj-$(CONFIG_CLK_R8A77995)		+= r8a77995-cpg-mssr.o

obj-$(CONFIG_CLK_SH73A0)		+= clk-sh73a0.o



# Family

obj-$(CONFIG_CLK_RCAR_GEN2)		+= clk-rcar-gen2.o

obj-$(CONFIG_CLK_RCAR_GEN2_CPG)		+= rcar-gen2-cpg.o

obj-$(CONFIG_CLK_RCAR_GEN3_CPG)		+= rcar-gen3-cpg.o

obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL)	+= rcar-usb2-clock-sel.o



# Generic

obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o

drivers/clk/renesas/clk-div6.c

+3 −0
Original line number Diff line number Diff line
@@ -29,6 +29,9 @@ 
 * @hw: handle between common and hardware-specific interfaces

 * @reg: IO-remapped register

 * @div: divisor value (1-64)

 * @src_shift: Shift to access the register bits to select the parent clock

 * @src_width: Number of register bits to select the parent clock (may be 0)

 * @parents: Array to map from valid parent clocks indices to hardware indices

 */

struct div6_clock {

	struct clk_hw hw;