[SPARC64]: Do not touch %tick_cmpr on sun4v cpus.



This register is not a part of the sun4v architecture.

Niagara 1 and 2 happened to leave it around.

Signed-off-by: David S. Miller <davem@davemloft.net>

parent cf5adce1

arch/sparc64/kernel/head.S

+2 −1

Original line number	Diff line number	Diff line
		@@ -715,12 +715,13 @@ setup_trap_table:

		membar #Sync

		BRANCH_IF_SUN4V(o2, 1f)

		/* Kill PROM timer */
		sethi %hi(0x80000000), %o2
		sllx %o2, 32, %o2
		wr %o2, 0, %tick_cmpr

		BRANCH_IF_SUN4V(o2, 1f)
		BRANCH_IF_ANY_CHEETAH(o2, o3, 1f)

		ba,pt %xcc, 2f