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Commit 52e43a11 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'ARM/clkevt/set-state-4.3' of...

Merge branch 'ARM/clkevt/set-state-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux into next/cleanup

Merge "ARM: clockevents: Migrate to 'set-state' callbacks" from Viresh Kumar:

This series migrates ARM clockevent drivers (present in arch/arm/
directory), to the new set-state interface. This would enable these
drivers to use new states (like: ONESHOT_STOPPED, etc.) of a clockevent
device (if required), as the set-mode interface is marked obsolete now
and wouldn't be expanded to handle new states.

* 'ARM/clkevt/set-state-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux

:
  ARM/orion/time: Migrate to new 'set-state' interface
  ARM/iop/time: Migrate to new 'set-state' interface
  ARM/w90x900/time: Migrate to new 'set-state' interface
  ARM/SPEAr/time: Migrate to new 'set-state' interface
  ARM/omap2/timer: Migrate to new 'set-state' interface
  ARM/omap1/timer32: Migrate to new 'set-state' interface
  ARM/omap1/time: Migrate to new 'set-state' interface
  ARM/netx/time: Migrate to new 'set-state' interface
  ARM/mmp/time: Migrate to new 'set-state' interface
  ARM/lpc32xx/timer: Migrate to new 'set-state' interface
  ARM/ks8695/time: Migrate to new 'set-state' interface
  ARM/ixp4xx/timer: Migrate to new 'set-state' interface
  ARM/imx/epit: Migrate to new 'set-state' interface
  ARM/gemini/time: Migrate to new 'set-state' interface
  ARM/dc21285-timer: Migrate to new 'set-state' interface
  ARM/davinci/time: Migrate to new 'set-state' interface
  ARM/cns3xxx/timer: Migrate to new 'set-state' interface
  ARM/smp_twd: Migrate to new 'set-state' interface

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b3f81739 10dca88a
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+26 −22
Original line number Original line Diff line number Diff line
@@ -36,29 +36,30 @@ static DEFINE_PER_CPU(bool, percpu_setup_called);
static struct clock_event_device __percpu *twd_evt;
static struct clock_event_device __percpu *twd_evt;
static int twd_ppi;
static int twd_ppi;


static void twd_set_mode(enum clock_event_mode mode,
static int twd_shutdown(struct clock_event_device *clk)
			struct clock_event_device *clk)
{
{
	unsigned long ctrl;
	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
	return 0;
}


	switch (mode) {
static int twd_set_oneshot(struct clock_event_device *clk)
	case CLOCK_EVT_MODE_PERIODIC:
{
		ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
			| TWD_TIMER_CONTROL_PERIODIC;
		writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
			twd_base + TWD_TIMER_LOAD);
		break;
	case CLOCK_EVT_MODE_ONESHOT:
	/* period set, and timer enabled in 'next_event' hook */
	/* period set, and timer enabled in 'next_event' hook */
		ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
	writel_relaxed(TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT,
		break;
		       twd_base + TWD_TIMER_CONTROL);
	case CLOCK_EVT_MODE_UNUSED:
	return 0;
	case CLOCK_EVT_MODE_SHUTDOWN:
	default:
		ctrl = 0;
}
}


static int twd_set_periodic(struct clock_event_device *clk)
{
	unsigned long ctrl = TWD_TIMER_CONTROL_ENABLE |
			     TWD_TIMER_CONTROL_IT_ENABLE |
			     TWD_TIMER_CONTROL_PERIODIC;

	writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
		       twd_base + TWD_TIMER_LOAD);
	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
	return 0;
}
}


static int twd_set_next_event(unsigned long evt,
static int twd_set_next_event(unsigned long evt,
@@ -94,7 +95,7 @@ static void twd_timer_stop(void)
{
{
	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);
	struct clock_event_device *clk = raw_cpu_ptr(twd_evt);


	twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
	twd_shutdown(clk);
	disable_percpu_irq(clk->irq);
	disable_percpu_irq(clk->irq);
}
}


@@ -296,7 +297,10 @@ static void twd_timer_setup(void)
	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
			CLOCK_EVT_FEAT_C3STOP;
			CLOCK_EVT_FEAT_C3STOP;
	clk->rating = 350;
	clk->rating = 350;
	clk->set_mode = twd_set_mode;
	clk->set_state_shutdown = twd_shutdown;
	clk->set_state_periodic = twd_set_periodic;
	clk->set_state_oneshot = twd_set_oneshot;
	clk->tick_resume = twd_shutdown;
	clk->set_next_event = twd_set_next_event;
	clk->set_next_event = twd_set_next_event;
	clk->irq = twd_ppi;
	clk->irq = twd_ppi;
	clk->cpumask = cpumask_of(cpu);
	clk->cpumask = cpumask_of(cpu);
+31 −24
Original line number Original line Diff line number Diff line
@@ -113,30 +113,33 @@ void cns3xxx_power_off(void)
 */
 */
static void __iomem *cns3xxx_tmr1;
static void __iomem *cns3xxx_tmr1;


static void cns3xxx_timer_set_mode(enum clock_event_mode mode,
static int cns3xxx_shutdown(struct clock_event_device *clk)
				   struct clock_event_device *clk)
{
	writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
	return 0;
}

static int cns3xxx_set_oneshot(struct clock_event_device *clk)
{
	unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);

	/* period set, and timer enabled in 'next_event' hook */
	ctrl |= (1 << 2) | (1 << 9);
	writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
	return 0;
}

static int cns3xxx_set_periodic(struct clock_event_device *clk)
{
{
	unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
	unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
	int pclk = cns3xxx_cpu_clock() / 8;
	int pclk = cns3xxx_cpu_clock() / 8;
	int reload;
	int reload;


	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
	reload = pclk * 20 / (3 * HZ) * 0x25000;
	reload = pclk * 20 / (3 * HZ) * 0x25000;
	writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
	writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
	ctrl |= (1 << 0) | (1 << 2) | (1 << 9);
	ctrl |= (1 << 0) | (1 << 2) | (1 << 9);
		break;
	case CLOCK_EVT_MODE_ONESHOT:
		/* period set, and timer enabled in 'next_event' hook */
		ctrl |= (1 << 2) | (1 << 9);
		break;
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
	default:
		ctrl = 0;
	}

	writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
	writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
	return 0;
}
}


static int cns3xxx_timer_set_next_event(unsigned long evt,
static int cns3xxx_timer_set_next_event(unsigned long evt,
@@ -152,8 +155,12 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,


static struct clock_event_device cns3xxx_tmr1_clockevent = {
static struct clock_event_device cns3xxx_tmr1_clockevent = {
	.name			= "cns3xxx timer1",
	.name			= "cns3xxx timer1",
	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.features		= CLOCK_EVT_FEAT_PERIODIC |
	.set_mode	= cns3xxx_timer_set_mode,
				  CLOCK_EVT_FEAT_ONESHOT,
	.set_state_shutdown	= cns3xxx_shutdown,
	.set_state_periodic	= cns3xxx_set_periodic,
	.set_state_oneshot	= cns3xxx_set_oneshot,
	.tick_resume		= cns3xxx_shutdown,
	.set_next_event		= cns3xxx_timer_set_next_event,
	.set_next_event		= cns3xxx_timer_set_next_event,
	.rating			= 350,
	.rating			= 350,
	.cpumask		= cpu_all_mask,
	.cpumask		= cpu_all_mask,
+30 −24
Original line number Original line Diff line number Diff line
@@ -303,36 +303,42 @@ static int davinci_set_next_event(unsigned long cycles,
	return 0;
	return 0;
}
}


static void davinci_set_mode(enum clock_event_mode mode,
static int davinci_shutdown(struct clock_event_device *evt)
			     struct clock_event_device *evt)
{
{
	struct timer_s *t = &timers[TID_CLOCKEVENT];
	struct timer_s *t = &timers[TID_CLOCKEVENT];


	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		t->period = davinci_clock_tick_rate / (HZ);
	t->opts &= ~TIMER_OPTS_STATE_MASK;
	t->opts &= ~TIMER_OPTS_STATE_MASK;
		t->opts |= TIMER_OPTS_PERIODIC;
	t->opts |= TIMER_OPTS_DISABLED;
		timer32_config(t);
	return 0;
		break;
}
	case CLOCK_EVT_MODE_ONESHOT:

static int davinci_set_oneshot(struct clock_event_device *evt)
{
	struct timer_s *t = &timers[TID_CLOCKEVENT];

	t->opts &= ~TIMER_OPTS_STATE_MASK;
	t->opts &= ~TIMER_OPTS_STATE_MASK;
	t->opts |= TIMER_OPTS_ONESHOT;
	t->opts |= TIMER_OPTS_ONESHOT;
		break;
	return 0;
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
		t->opts &= ~TIMER_OPTS_STATE_MASK;
		t->opts |= TIMER_OPTS_DISABLED;
		break;
	case CLOCK_EVT_MODE_RESUME:
		break;
}
}

static int davinci_set_periodic(struct clock_event_device *evt)
{
	struct timer_s *t = &timers[TID_CLOCKEVENT];

	t->period = davinci_clock_tick_rate / (HZ);
	t->opts &= ~TIMER_OPTS_STATE_MASK;
	t->opts |= TIMER_OPTS_PERIODIC;
	timer32_config(t);
	return 0;
}
}


static struct clock_event_device clockevent_davinci = {
static struct clock_event_device clockevent_davinci = {
	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.features		= CLOCK_EVT_FEAT_PERIODIC |
				  CLOCK_EVT_FEAT_ONESHOT,
	.set_next_event		= davinci_set_next_event,
	.set_next_event		= davinci_set_next_event,
	.set_mode	= davinci_set_mode,
	.set_state_shutdown	= davinci_shutdown,
	.set_state_periodic	= davinci_set_periodic,
	.set_state_oneshot	= davinci_set_oneshot,
};
};




+23 −25
Original line number Original line Diff line number Diff line
@@ -57,24 +57,19 @@ static int ckevt_dc21285_set_next_event(unsigned long delta,
	return 0;
	return 0;
}
}


static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
static int ckevt_dc21285_shutdown(struct clock_event_device *c)
	struct clock_event_device *c)
{
	*CSR_TIMER1_CNTL = 0;
	return 0;
}

static int ckevt_dc21285_set_periodic(struct clock_event_device *c)
{
{
	switch (mode) {
	case CLOCK_EVT_MODE_RESUME:
	case CLOCK_EVT_MODE_PERIODIC:
	*CSR_TIMER1_CLR = 0;
	*CSR_TIMER1_CLR = 0;
	*CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
	*CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
	*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD |
	*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD |
			   TIMER_CNTL_DIV16;
			   TIMER_CNTL_DIV16;
		break;
	return 0;

	case CLOCK_EVT_MODE_ONESHOT:
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
		*CSR_TIMER1_CNTL = 0;
		break;
	}
}
}


static struct clock_event_device ckevt_dc21285 = {
static struct clock_event_device ckevt_dc21285 = {
@@ -84,7 +79,10 @@ static struct clock_event_device ckevt_dc21285 = {
	.rating			= 200,
	.rating			= 200,
	.irq			= IRQ_TIMER1,
	.irq			= IRQ_TIMER1,
	.set_next_event		= ckevt_dc21285_set_next_event,
	.set_next_event		= ckevt_dc21285_set_next_event,
	.set_mode	= ckevt_dc21285_set_mode,
	.set_state_shutdown	= ckevt_dc21285_shutdown,
	.set_state_periodic	= ckevt_dc21285_set_periodic,
	.set_state_oneshot	= ckevt_dc21285_shutdown,
	.tick_resume		= ckevt_dc21285_set_periodic,
};
};


static irqreturn_t timer1_interrupt(int irq, void *dev_id)
static irqreturn_t timer1_interrupt(int irq, void *dev_id)
@@ -94,7 +92,7 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id)
	*CSR_TIMER1_CLR = 0;
	*CSR_TIMER1_CLR = 0;


	/* Stop the timer if in one-shot mode */
	/* Stop the timer if in one-shot mode */
	if (ce->mode == CLOCK_EVT_MODE_ONESHOT)
	if (clockevent_state_oneshot(ce))
		*CSR_TIMER1_CNTL = 0;
		*CSR_TIMER1_CNTL = 0;


	ce->event_handler(ce);
	ce->event_handler(ce);
+34 −35
Original line number Original line Diff line number Diff line
@@ -59,49 +59,48 @@ static int gemini_timer_set_next_event(unsigned long cycles,
	return 0;
	return 0;
}
}


static void gemini_timer_set_mode(enum clock_event_mode mode,
static int gemini_timer_shutdown(struct clock_event_device *evt)
				  struct clock_event_device *evt)
{
{
	u32 period = DIV_ROUND_CLOSEST(tick_rate, HZ);
	u32 cr;
	u32 cr;


	switch (mode) {
        case CLOCK_EVT_MODE_PERIODIC:
		/* Start the timer */
		writel(period,
		       TIMER_COUNT(IO_ADDRESS(GEMINI_TIMER2_BASE)));
		writel(period,
		       TIMER_LOAD(IO_ADDRESS(GEMINI_TIMER2_BASE)));
		cr = readl(TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
		cr |= TIMER_2_CR_ENABLE;
		cr |= TIMER_2_CR_INT;
		writel(cr, TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
		break;
	case CLOCK_EVT_MODE_ONESHOT:
	case CLOCK_EVT_MODE_UNUSED:
        case CLOCK_EVT_MODE_SHUTDOWN:
	case CLOCK_EVT_MODE_RESUME:
	/*
	/*
		 * Disable also for oneshot: the set_next() call will
	 * Disable also for oneshot: the set_next() call will arm the timer
		 * arm the timer instead.
	 * instead.
	 */
	 */
	cr = readl(TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
	cr = readl(TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
	cr &= ~TIMER_2_CR_ENABLE;
	cr &= ~TIMER_2_CR_ENABLE;
	cr &= ~TIMER_2_CR_INT;
	cr &= ~TIMER_2_CR_INT;
	writel(cr, TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
	writel(cr, TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
		break;
	return 0;
	default:
                break;
}
}

static int gemini_timer_set_periodic(struct clock_event_device *evt)
{
	u32 period = DIV_ROUND_CLOSEST(tick_rate, HZ);
	u32 cr;

	/* Start the timer */
	writel(period, TIMER_COUNT(IO_ADDRESS(GEMINI_TIMER2_BASE)));
	writel(period, TIMER_LOAD(IO_ADDRESS(GEMINI_TIMER2_BASE)));
	cr = readl(TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
	cr |= TIMER_2_CR_ENABLE;
	cr |= TIMER_2_CR_INT;
	writel(cr, TIMER_CR(IO_ADDRESS(GEMINI_TIMER_BASE)));
	return 0;
}
}


/* Use TIMER2 as clock event */
/* Use TIMER2 as clock event */
static struct clock_event_device gemini_clockevent = {
static struct clock_event_device gemini_clockevent = {
	.name			= "TIMER2",
	.name			= "TIMER2",
	.rating		= 300, /* Reasonably fast and accurate clock event */
	/* Reasonably fast and accurate clock event */
	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
	.rating			= 300,
	.features		= CLOCK_EVT_FEAT_PERIODIC |
				  CLOCK_EVT_FEAT_ONESHOT,
	.set_next_event		= gemini_timer_set_next_event,
	.set_next_event		= gemini_timer_set_next_event,
	.set_mode	= gemini_timer_set_mode,
	.set_state_shutdown	= gemini_timer_shutdown,
	.set_state_periodic	= gemini_timer_set_periodic,
	.set_state_oneshot	= gemini_timer_shutdown,
	.tick_resume		= gemini_timer_shutdown,
};
};


/*
/*
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