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Commit 529febee authored by Shengzhou Liu's avatar Shengzhou Liu Committed by Greg Kroah-Hartman
Browse files

powerpc/usb: fix issue of CPU halt when missing USB PHY clock 



when missing USB PHY clock, kernel booting up will halt during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hang in this case.

Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent ed2833ac

drivers/usb/host/ehci-fsl.c

+9 −2
Original line number Diff line number Diff line
@@ -239,7 +239,7 @@ static void ehci_fsl_setup_phy(struct ehci_hcd *ehci, 
	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);

}



static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)

static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)

{

	struct usb_hcd *hcd = ehci_to_hcd(ehci);

	struct fsl_usb2_platform_data *pdata;
@@ -299,12 +299,19 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci) 
#endif

		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);

	}



	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {

		printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");

		return -ENODEV;

	}

	return 0;

}



/* called after powerup, by probe or system-pm "wakeup" */

static int ehci_fsl_reinit(struct ehci_hcd *ehci)

{

	ehci_fsl_usb_setup(ehci);

	if (ehci_fsl_usb_setup(ehci))

		return -ENODEV;

	ehci_port_power(ehci, 0);



	return 0;

drivers/usb/host/ehci-fsl.h

+1 −0
Original line number Diff line number Diff line
@@ -45,5 +45,6 @@ 
#define FSL_SOC_USB_PRICTRL	0x40c	/* NOTE: big-endian */

#define FSL_SOC_USB_SICTRL	0x410	/* NOTE: big-endian */

#define FSL_SOC_USB_CTRL	0x500	/* NOTE: big-endian */

#define CTRL_PHY_CLK_VALID	(1 << 17)

#define SNOOP_SIZE_2GB		0x1e

#endif				/* _EHCI_FSL_H */