Loading Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt +1 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ Optionnal properties: Example: sound { compatible = "rockchip,rockchip-audio-es8388"; compatible = "rockchip,rk3288-hdmi-analog"; rockchip,model = "Analog audio output"; rockchip,i2s-controller = <&i2s>; rockchip,audio-codec = <&es8388>; Loading sound/soc/codecs/rt5659.c +2 −2 Original line number Diff line number Diff line Loading @@ -2500,9 +2500,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L1_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R1_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2, SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2, SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), Loading sound/soc/codecs/rt5659.h +1 −1 Original line number Diff line number Diff line Loading @@ -1008,7 +1008,7 @@ #define RT5659_PWR_ADC_R1 (0x1 << 3) #define RT5659_PWR_ADC_R1_BIT 3 #define RT5659_PWR_ADC_L2 (0x1 << 2) #define RT5659_PWR_ADC_L2_BIT 4 #define RT5659_PWR_ADC_L2_BIT 2 #define RT5659_PWR_ADC_R2 (0x1 << 1) #define RT5659_PWR_ADC_R2_BIT 1 #define RT5659_PWR_CLS_D (0x1) Loading sound/soc/codecs/ssm2602.c +13 −6 Original line number Diff line number Diff line Loading @@ -54,10 +54,17 @@ struct ssm2602_priv { * using 2 wire for device control, so we cache them instead. * There is no point in caching the reset register */ static const u16 ssm2602_reg[SSM2602_CACHEREGNUM] = { 0x0097, 0x0097, 0x0079, 0x0079, 0x000a, 0x0008, 0x009f, 0x000a, 0x0000, 0x0000 static const struct reg_default ssm2602_reg[SSM2602_CACHEREGNUM] = { { .reg = 0x00, .def = 0x0097 }, { .reg = 0x01, .def = 0x0097 }, { .reg = 0x02, .def = 0x0079 }, { .reg = 0x03, .def = 0x0079 }, { .reg = 0x04, .def = 0x000a }, { .reg = 0x05, .def = 0x0008 }, { .reg = 0x06, .def = 0x009f }, { .reg = 0x07, .def = 0x000a }, { .reg = 0x08, .def = 0x0000 }, { .reg = 0x09, .def = 0x0000 } }; Loading Loading @@ -620,8 +627,8 @@ const struct regmap_config ssm2602_regmap_config = { .volatile_reg = ssm2602_register_volatile, .cache_type = REGCACHE_RBTREE, .reg_defaults_raw = ssm2602_reg, .num_reg_defaults_raw = ARRAY_SIZE(ssm2602_reg), .reg_defaults = ssm2602_reg, .num_reg_defaults = ARRAY_SIZE(ssm2602_reg), }; EXPORT_SYMBOL_GPL(ssm2602_regmap_config); Loading sound/soc/rockchip/rk3288_hdmi_analog.c +1 −1 Original line number Diff line number Diff line Loading @@ -155,7 +155,7 @@ static struct snd_soc_dai_link_component rk_codecs[] = { { }, { .name = "hdmi-audio-codec.2.auto", .dai_name = "hdmi-hifi.0", .dai_name = "i2s-hifi", }, }; Loading Loading
Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt +1 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ Optionnal properties: Example: sound { compatible = "rockchip,rockchip-audio-es8388"; compatible = "rockchip,rk3288-hdmi-analog"; rockchip,model = "Analog audio output"; rockchip,i2s-controller = <&i2s>; rockchip,audio-codec = <&es8388>; Loading
sound/soc/codecs/rt5659.c +2 −2 Original line number Diff line number Diff line Loading @@ -2500,9 +2500,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L1_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R1_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2, SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2, SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), Loading
sound/soc/codecs/rt5659.h +1 −1 Original line number Diff line number Diff line Loading @@ -1008,7 +1008,7 @@ #define RT5659_PWR_ADC_R1 (0x1 << 3) #define RT5659_PWR_ADC_R1_BIT 3 #define RT5659_PWR_ADC_L2 (0x1 << 2) #define RT5659_PWR_ADC_L2_BIT 4 #define RT5659_PWR_ADC_L2_BIT 2 #define RT5659_PWR_ADC_R2 (0x1 << 1) #define RT5659_PWR_ADC_R2_BIT 1 #define RT5659_PWR_CLS_D (0x1) Loading
sound/soc/codecs/ssm2602.c +13 −6 Original line number Diff line number Diff line Loading @@ -54,10 +54,17 @@ struct ssm2602_priv { * using 2 wire for device control, so we cache them instead. * There is no point in caching the reset register */ static const u16 ssm2602_reg[SSM2602_CACHEREGNUM] = { 0x0097, 0x0097, 0x0079, 0x0079, 0x000a, 0x0008, 0x009f, 0x000a, 0x0000, 0x0000 static const struct reg_default ssm2602_reg[SSM2602_CACHEREGNUM] = { { .reg = 0x00, .def = 0x0097 }, { .reg = 0x01, .def = 0x0097 }, { .reg = 0x02, .def = 0x0079 }, { .reg = 0x03, .def = 0x0079 }, { .reg = 0x04, .def = 0x000a }, { .reg = 0x05, .def = 0x0008 }, { .reg = 0x06, .def = 0x009f }, { .reg = 0x07, .def = 0x000a }, { .reg = 0x08, .def = 0x0000 }, { .reg = 0x09, .def = 0x0000 } }; Loading Loading @@ -620,8 +627,8 @@ const struct regmap_config ssm2602_regmap_config = { .volatile_reg = ssm2602_register_volatile, .cache_type = REGCACHE_RBTREE, .reg_defaults_raw = ssm2602_reg, .num_reg_defaults_raw = ARRAY_SIZE(ssm2602_reg), .reg_defaults = ssm2602_reg, .num_reg_defaults = ARRAY_SIZE(ssm2602_reg), }; EXPORT_SYMBOL_GPL(ssm2602_regmap_config); Loading
sound/soc/rockchip/rk3288_hdmi_analog.c +1 −1 Original line number Diff line number Diff line Loading @@ -155,7 +155,7 @@ static struct snd_soc_dai_link_component rk_codecs[] = { { }, { .name = "hdmi-audio-codec.2.auto", .dai_name = "hdmi-hifi.0", .dai_name = "i2s-hifi", }, }; Loading