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Commit 52219902 authored by Jon Mason's avatar Jon Mason Committed by Florian Fainelli
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ARM: dts: NSP: Fix PCIE DT issue 



Adding the ranges value is preventing the PCI nodes from working.
Pulling them out outside makes them work again (and makes it similar to
the NS2 device tree).

Signed-off-by: default avatarJon Mason <jonmason@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 018e4feb

arch/arm/boot/dts/bcm-nsp.dtsi

+72 −72
Original line number Diff line number Diff line
@@ -197,9 +197,59 @@ 
			status = "disabled";

		};



		pcie0: pcie@12000 {

		nand: nand@26000 {

			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";

			reg = <0x026000 0x600>,

			      <0x11b408 0x600>,

			      <0x026f00 0x20>;

			reg-names = "nand", "iproc-idm", "iproc-ext";

			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;



			#address-cells = <1>;

			#size-cells = <0>;



			brcm,nand-has-wp;

		};



		i2c0: i2c@38000 {

			compatible = "brcm,iproc-i2c";

			reg = <0x38000 0x50>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;

			clock-frequency = <100000>;

		};



		lcpll0: lcpll0@3f100 {

			#clock-cells = <1>;

			compatible = "brcm,nsp-lcpll0";

			reg = <0x3f100 0x14>;

			clocks = <&osc>;

			clock-output-names = "lcpll0", "pcie_phy", "sdio",

					     "ddr_phy";

		};



		genpll: genpll@3f140 {

			#clock-cells = <1>;

			compatible = "brcm,nsp-genpll";

			reg = <0x3f140 0x24>;

			clocks = <&osc>;

			clock-output-names = "genpll", "phy", "ethernetclk",

					     "usbclk", "iprocfast", "sata1",

					     "sata2";

		};



		pinctrl: pinctrl@3f1c0 {

			compatible = "brcm,nsp-pinmux";

			reg = <0x3f1c0 0x04>,

			      <0x30028 0x04>,

			      <0x3f408 0x04>;

		};

	};



	pcie0: pcie@18012000 {

		compatible = "brcm,iproc-pcie";

			reg = <0x12000 0x1000>;

		reg = <0x18012000 0x1000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0>;
@@ -221,9 +271,9 @@ 
		status = "disabled";

	};



		pcie1: pcie@13000 {

	pcie1: pcie@18013000 {

		compatible = "brcm,iproc-pcie";

			reg = <0x13000 0x1000>;

		reg = <0x18013000 0x1000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0>;
@@ -245,9 +295,9 @@ 
		status = "disabled";

	};



		pcie2: pcie@14000 {

	pcie2: pcie@18014000 {

		compatible = "brcm,iproc-pcie";

			reg = <0x14000 0x1000>;

		reg = <0x18014000 0x1000>;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0>;
@@ -268,54 +318,4 @@ 


		status = "disabled";

	};



		nand: nand@26000 {

			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";

			reg = <0x026000 0x600>,

			      <0x11b408 0x600>,

			      <0x026f00 0x20>;

			reg-names = "nand", "iproc-idm", "iproc-ext";

			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;



			#address-cells = <1>;

			#size-cells = <0>;



			brcm,nand-has-wp;

		};



		i2c0: i2c@38000 {

			compatible = "brcm,iproc-i2c";

			reg = <0x38000 0x50>;

			#address-cells = <1>;

			#size-cells = <0>;

			interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;

			clock-frequency = <100000>;

		};



		lcpll0: lcpll0@3f100 {

			#clock-cells = <1>;

			compatible = "brcm,nsp-lcpll0";

			reg = <0x3f100 0x14>;

			clocks = <&osc>;

			clock-output-names = "lcpll0", "pcie_phy", "sdio",

					     "ddr_phy";

		};



		genpll: genpll@3f140 {

			#clock-cells = <1>;

			compatible = "brcm,nsp-genpll";

			reg = <0x3f140 0x24>;

			clocks = <&osc>;

			clock-output-names = "genpll", "phy", "ethernetclk",

					     "usbclk", "iprocfast", "sata1",

					     "sata2";

		};



		pinctrl: pinctrl@3f1c0 {

			compatible = "brcm,nsp-pinmux";

			reg = <0x3f1c0 0x04>,

			      <0x30028 0x04>,

			      <0x3f408 0x04>;

		};

	};

};