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Commit 51751f7d authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Ben Skeggs
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drm/nouveau/gr: support for GP10B



GR is similar to GP100, with a few unavailable registers.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 0af0327c
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+1 −0
Original line number Diff line number Diff line
@@ -44,4 +44,5 @@ int gm200_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
int gm20b_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
int gp100_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
int gp102_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
int gp10b_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
#endif
+1 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ nvkm-y += nvkm/engine/gr/gm200.o
nvkm-y += nvkm/engine/gr/gm20b.o
nvkm-y += nvkm/engine/gr/gp100.o
nvkm-y += nvkm/engine/gr/gp102.o
nvkm-y += nvkm/engine/gr/gp10b.o

nvkm-y += nvkm/engine/gr/ctxnv40.o
nvkm-y += nvkm/engine/gr/ctxnv50.o
+4 −0
Original line number Diff line number Diff line
@@ -125,6 +125,7 @@ struct gf100_gr_func {
	void (*init_rop_active_fbps)(struct gf100_gr *);
	void (*init_ppc_exceptions)(struct gf100_gr *);
	void (*init_swdx_pes_mask)(struct gf100_gr *);
	void (*init_num_active_ltcs)(struct gf100_gr *);
	void (*set_hww_esr_report_mask)(struct gf100_gr *);
	const struct gf100_gr_pack *mmio;
	struct {
@@ -301,4 +302,7 @@ extern const struct gf100_gr_init gm107_gr_init_cbm_0[];
void gm107_gr_init_bios(struct gf100_gr *);

void gm200_gr_init_gpc_mmu(struct gf100_gr *);

void gp100_gr_init_num_active_ltcs(struct gf100_gr *gr);

#endif
+11 −2
Original line number Diff line number Diff line
@@ -40,6 +40,15 @@ gp100_gr_init_rop_active_fbps(struct gf100_gr *gr)
	nvkm_mask(device, 0x408958, 0x0000000f, fbp_count); /* crop */
}

void
gp100_gr_init_num_active_ltcs(struct gf100_gr *gr)
{
	struct nvkm_device *device = gr->base.engine.subdev.device;

	nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
	nvkm_wr32(device, GPC_BCAST(0x033c), nvkm_rd32(device, 0x100804));
}

int
gp100_gr_init(struct gf100_gr *gr)
{
@@ -81,8 +90,7 @@ gp100_gr_init(struct gf100_gr *gr)
	}

	nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
	nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
	nvkm_wr32(device, GPC_BCAST(0x033c), nvkm_rd32(device, 0x100804));
	gr->func->init_num_active_ltcs(gr);

	gr->func->init_rop_active_fbps(gr);
	if (gr->func->init_swdx_pes_mask)
@@ -154,6 +162,7 @@ gp100_gr = {
	.init_gpc_mmu = gm200_gr_init_gpc_mmu,
	.init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
	.init_num_active_ltcs = gp100_gr_init_num_active_ltcs,
	.rops = gm200_gr_rops,
	.ppc_nr = 2,
	.grctx = &gp100_grctx,
+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ gp102_gr = {
	.init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
	.init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask,
	.init_num_active_ltcs = gp100_gr_init_num_active_ltcs,
	.rops = gm200_gr_rops,
	.ppc_nr = 3,
	.grctx = &gp102_grctx,
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