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Commit 513c4ec6 authored by H. Peter Anvin's avatar H. Peter Anvin
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x86, cpufeature: Add CPU features from Intel document 319433-012A 



Add CPU features from the Intel Archicture Instruction Set Extensions
Programming Reference version 012A (Feb 2012), document number 319433-012A.

Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent b01543df

arch/x86/include/asm/cpufeature.h

+3 −0
Original line number Diff line number Diff line
@@ -199,10 +199,13 @@ 
/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */

#define X86_FEATURE_FSGSBASE	(9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/

#define X86_FEATURE_BMI1	(9*32+ 3) /* 1st group bit manipulation extensions */

#define X86_FEATURE_HLE		(9*32+ 4) /* Hardware Lock Elision */

#define X86_FEATURE_AVX2	(9*32+ 5) /* AVX2 instructions */

#define X86_FEATURE_SMEP	(9*32+ 7) /* Supervisor Mode Execution Protection */

#define X86_FEATURE_BMI2	(9*32+ 8) /* 2nd group bit manipulation extensions */

#define X86_FEATURE_ERMS	(9*32+ 9) /* Enhanced REP MOVSB/STOSB */

#define X86_FEATURE_INVPCID	(9*32+10) /* Invalidate Processor Context ID */

#define X86_FEATURE_RTM		(9*32+11) /* Restricted Transactional Memory */



#if defined(__KERNEL__) && !defined(__ASSEMBLY__)