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Commit 5045388c authored by Eliad Peller's avatar Eliad Peller Committed by Emmanuel Grumbach
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iwlwifi: pcie: clean iwl_pcie_[rt]xq_inc_wr_ptr a bit 



The various code blocks in iwl_pcie_[rt]xq_inc_wr_ptr
finally do the same things, so just merge them
all and make the functions cleaner.

Signed-off-by: default avatarEliad Peller <eliadx.peller@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent e57f1734

drivers/net/wireless/iwlwifi/pcie/rx.c

+18 −29
Original line number Diff line number Diff line
@@ -155,37 +155,26 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans, 
	if (rxq->need_update == 0)

		goto exit_unlock;



	if (trans->cfg->base_params->shadow_reg_enable) {

		/* shadow register enabled */

		/* Device expects a multiple of 8 */

		rxq->write_actual = (rxq->write & ~0x7);

		iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual);

	} else {

		/* If power-saving is in use, make sure device is awake */

		if (test_bit(STATUS_TPOWER_PMI, &trans->status)) {

	/*

	 * explicitly wake up the NIC if:

	 * 1. shadow registers aren't enabled

	 * 2. there is a chance that the NIC is asleep

	 */

	if (!trans->cfg->base_params->shadow_reg_enable &&

	    test_bit(STATUS_TPOWER_PMI, &trans->status)) {

		reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);



		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {

				IWL_DEBUG_INFO(trans,

					"Rx queue requesting wakeup,"

					" GP1 = 0x%x\n", reg);

			IWL_DEBUG_INFO(trans, "Rx queue requesting wakeup, GP1 = 0x%x\n",

				       reg);

			iwl_set_bit(trans, CSR_GP_CNTRL,

				    CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);

			goto exit_unlock;

		}



			rxq->write_actual = (rxq->write & ~0x7);

			iwl_write_direct32(trans, FH_RSCSR_CHNL0_WPTR,

					   rxq->write_actual);



		/* Else device is assumed to be awake */

		} else {

			/* Device expects a multiple of 8 */

			rxq->write_actual = (rxq->write & ~0x7);

			iwl_write_direct32(trans, FH_RSCSR_CHNL0_WPTR,

					   rxq->write_actual);

		}

	}



	rxq->write_actual = round_down(rxq->write, 8);

	iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual);

	rxq->need_update = 0;



 exit_unlock:

drivers/net/wireless/iwlwifi/pcie/tx.c

+29 −34
Original line number Diff line number Diff line
@@ -296,43 +296,38 @@ void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq) 
	if (txq->need_update == 0)

		return;



	if (trans->cfg->base_params->shadow_reg_enable ||

	    txq_id == trans_pcie->cmd_queue) {

		/* shadow register enabled */

		iwl_write32(trans, HBUS_TARG_WRPTR,

			    txq->q.write_ptr | (txq_id << 8));

	} else {

		/* if we're trying to save power */

		if (test_bit(STATUS_TPOWER_PMI, &trans->status)) {

			/* wake up nic if it's powered down ...

	/*

	 * explicitly wake up the NIC if:

	 * 1. shadow registers aren't enabled

	 * 2. NIC is woken up for CMD regardless of shadow outside this function

	 * 3. there is a chance that the NIC is asleep

	 */

	if (!trans->cfg->base_params->shadow_reg_enable &&

	    txq_id != trans_pcie->cmd_queue &&

	    test_bit(STATUS_TPOWER_PMI, &trans->status)) {

		/*

		 * wake up nic if it's powered down ...

		 * uCode will wake up, and interrupt us again, so next

			 * time we'll skip this part. */

		 * time we'll skip this part.

		 */

		reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);



		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {

				IWL_DEBUG_INFO(trans,

					"Tx queue %d requesting wakeup,"

					" GP1 = 0x%x\n", txq_id, reg);

			IWL_DEBUG_INFO(trans, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",

				       txq_id, reg);

			iwl_set_bit(trans, CSR_GP_CNTRL,

				    CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);

			return;

		}



			IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id,

				     txq->q.write_ptr);



			iwl_write_direct32(trans, HBUS_TARG_WRPTR,

				     txq->q.write_ptr | (txq_id << 8));

	}



	/*

		 * else not in power-save mode,

		 * uCode will never sleep when we're

	 * if not in power-save mode, uCode will never sleep when we're

	 * trying to tx (during RFKILL, we're not trying to tx).

	 */

		} else

			iwl_write32(trans, HBUS_TARG_WRPTR,

				    txq->q.write_ptr | (txq_id << 8));

	}

	IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id, txq->q.write_ptr);

	iwl_write32(trans, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));



	txq->need_update = 0;

}