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Commit 4e88f3de authored by Thierry Reding's avatar Thierry Reding Committed by Michael Turquette
Browse files

clk: Introduce clk_has_parent() 



This new function is similar to clk_set_parent(), except that it doesn't
actually change the parent. It merely checks that the given parent clock
can be a parent for the given clock.

A situation where this is useful is to check that a particular setup is
valid before switching to it. One specific use-case for this is atomic
modesetting in the DRM framework where setting a mode is divided into a
check phase where a given configuration is validated before applying
changes to the hardware.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarMichael Turquette <mturquette@linaro.org>
parent 97bf6af1

drivers/clk/clk.c

+30 −0
Original line number Diff line number Diff line
@@ -1651,6 +1651,36 @@ void __clk_reparent(struct clk *clk, struct clk *new_parent) 
	__clk_recalc_rates(clk, POST_RATE_CHANGE);

}



/**

 * clk_has_parent - check if a clock is a possible parent for another

 * @clk: clock source

 * @parent: parent clock source

 *

 * This function can be used in drivers that need to check that a clock can be

 * the parent of another without actually changing the parent.

 *

 * Returns true if @parent is a possible parent for @clk, false otherwise.

 */

bool clk_has_parent(struct clk *clk, struct clk *parent)

{

	unsigned int i;



	/* NULL clocks should be nops, so return success if either is NULL. */

	if (!clk || !parent)

		return true;



	/* Optimize for the case where the parent is already the parent. */

	if (clk->parent == parent)

		return true;



	for (i = 0; i < clk->num_parents; i++)

		if (strcmp(clk->parent_names[i], parent->name) == 0)

			return true;



	return false;

}

EXPORT_SYMBOL_GPL(clk_has_parent);



/**

 * clk_set_parent - switch the parent of a mux clk

 * @clk: the mux clk whose input we are switching

include/linux/clk.h

+17 −0
Original line number Diff line number Diff line
@@ -301,6 +301,18 @@ long clk_round_rate(struct clk *clk, unsigned long rate); 
 */

int clk_set_rate(struct clk *clk, unsigned long rate);



/**

 * clk_has_parent - check if a clock is a possible parent for another

 * @clk: clock source

 * @parent: parent clock source

 *

 * This function can be used in drivers that need to check that a clock can be

 * the parent of another without actually changing the parent.

 *

 * Returns true if @parent is a possible parent for @clk, false otherwise.

 */

bool clk_has_parent(struct clk *clk, struct clk *parent);



/**

 * clk_set_parent - set the parent clock source for this clock

 * @clk: clock source
@@ -374,6 +386,11 @@ static inline long clk_round_rate(struct clk *clk, unsigned long rate) 
	return 0;

}



static inline bool clk_has_parent(struct clk *clk, struct clk *parent)

{

	return true;

}



static inline int clk_set_parent(struct clk *clk, struct clk *parent)

{

	return 0;