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Commit 4e19dcd9 authored by Michael Turquette's avatar Michael Turquette
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Merge tag 'clk-renesas-for-v4.13-tag1' of... 

Merge tag 'clk-renesas-for-v4.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

clk: renesas: Updates for v4.13

  - Add more module clocks for R-Car H3 ES2.0 and M3-W,
  - Add CPG/MSSR drivers for all supported R-Car Gen2 SoCs, enabling support
    for module resets, which are not supported by the existing driver,
  - Rework Kconfig and Makefile logic,
  - Small fixes and cleanups.
parents ee177c5d 2d75588a

Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt

+8 −2
Original line number Diff line number Diff line
@@ -15,6 +15,11 @@ Required Properties: 
  - compatible: Must be one of:

      - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)

      - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)

      - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2)

      - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W)

      - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H)

      - "renesas,r8a7793-cpg-mssr" for the r8a7793 SoC (R-Car M2-N)

      - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)

      - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)

      - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
@@ -24,9 +29,10 @@ Required Properties: 
  - clocks: References to external parent clocks, one entry for each entry in

    clock-names

  - clock-names: List of external parent clock names. Valid names are:

      - "extal" (r8a7743, r8a7745, r8a7795, r8a7796)

      - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,

		 r8a7795, r8a7796)

      - "extalr" (r8a7795, r8a7796)

      - "usb_extal" (r8a7743, r8a7745)

      - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)



  - #clock-cells: Must be 2

      - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"

drivers/clk/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ 
obj-$(CONFIG_MACH_PISTACHIO)		+= pistachio/

obj-$(CONFIG_COMMON_CLK_PXA)		+= pxa/

obj-$(CONFIG_COMMON_CLK_QCOM)		+= qcom/

obj-$(CONFIG_ARCH_RENESAS)		+= renesas/

obj-y					+= renesas/

obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/

obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/

obj-$(CONFIG_ARCH_SIRF)			+= sirf/

drivers/clk/renesas/Kconfig

+124 −15
Original line number Diff line number Diff line 
config CLK_RENESAS

	bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS

	default y if ARCH_RENESAS

	select CLK_EMEV2 if ARCH_EMEV2

	select CLK_RZA1 if ARCH_R7S72100

	select CLK_R8A73A4 if ARCH_R8A73A4

	select CLK_R8A7740 if ARCH_R8A7740

	select CLK_R8A7743 if ARCH_R8A7743

	select CLK_R8A7745 if ARCH_R8A7745

	select CLK_R8A7778 if ARCH_R8A7778

	select CLK_R8A7779 if ARCH_R8A7779

	select CLK_R8A7790 if ARCH_R8A7790

	select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793

	select CLK_R8A7792 if ARCH_R8A7792

	select CLK_R8A7794 if ARCH_R8A7794

	select CLK_R8A7795 if ARCH_R8A7795

	select CLK_R8A7796 if ARCH_R8A7796

	select CLK_SH73A0 if ARCH_SH73A0



if CLK_RENESAS



config CLK_RENESAS_LEGACY

	bool "Legacy DT clock support"

	depends on CLK_R8A7790 || CLK_R8A7791 || CLK_R8A7792 || CLK_R8A7794

	default y

	help

	  Enable backward compatibility with old device trees describing a

	  hierarchical representation of the various CPG and MSTP clocks.



	  Say Y if you want your kernel to work with old DTBs.



# SoC

config CLK_EMEV2

	bool "Emma Mobile EV2 clock support" if COMPILE_TEST



config CLK_RZA1

	bool

	select CLK_RENESAS_CPG_MSTP



config CLK_R8A73A4

	bool

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6



config CLK_R8A7740

	bool

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6



config CLK_R8A7743

	bool

	select CLK_RCAR_GEN2_CPG



config CLK_R8A7745

	bool

	select CLK_RCAR_GEN2_CPG



config CLK_R8A7778

	bool

	select CLK_RENESAS_CPG_MSTP



config CLK_R8A7779

	bool

	select CLK_RENESAS_CPG_MSTP



config CLK_R8A7790

	bool

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG

	select CLK_RENESAS_DIV6



config CLK_R8A7791

	bool

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG

	select CLK_RENESAS_DIV6



config CLK_R8A7792

	bool

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG



config CLK_R8A7794

	bool

	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY

	select CLK_RCAR_GEN2_CPG

	select CLK_RENESAS_DIV6



config CLK_R8A7795

	bool

	select CLK_RCAR_GEN3_CPG



config CLK_R8A7796

	bool

	select CLK_RCAR_GEN3_CPG



config CLK_SH73A0

	bool

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6





# Family

config CLK_RCAR_GEN2

	bool

	select CLK_RENESAS_CPG_MSTP

	select CLK_RENESAS_DIV6



config CLK_RCAR_GEN2_CPG

	bool

	select CLK_RENESAS_CPG_MSSR



config CLK_RCAR_GEN3_CPG

	bool

	select CLK_RENESAS_CPG_MSSR





# Generic

config CLK_RENESAS_CPG_MSSR

	bool

	default y if ARCH_R8A7743

	default y if ARCH_R8A7745

	default y if ARCH_R8A7795

	default y if ARCH_R8A7796

	select CLK_RENESAS_DIV6



config CLK_RENESAS_CPG_MSTP

	bool

	default y if ARCH_R7S72100

	default y if ARCH_R8A73A4

	default y if ARCH_R8A7740

	default y if ARCH_R8A7778

	default y if ARCH_R8A7779

	default y if ARCH_R8A7790

	default y if ARCH_R8A7791

	default y if ARCH_R8A7792

	default y if ARCH_R8A7793

	default y if ARCH_R8A7794

	default y if ARCH_SH73A0
 


config CLK_RENESAS_DIV6

	bool "DIV6 clock support" if COMPILE_TEST



endif # CLK_RENESAS

drivers/clk/renesas/Makefile

+24 −17
Original line number Diff line number Diff line 
obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o

obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o

obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7743)		+= r8a7743-cpg-mssr.o rcar-gen2-cpg.o

obj-$(CONFIG_ARCH_R8A7745)		+= r8a7745-cpg-mssr.o rcar-gen2-cpg.o

obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o

obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o

obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7792)		+= clk-rcar-gen2.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o clk-div6.o

obj-$(CONFIG_ARCH_R8A7795)		+= r8a7795-cpg-mssr.o rcar-gen3-cpg.o

obj-$(CONFIG_ARCH_R8A7796)		+= r8a7796-cpg-mssr.o rcar-gen3-cpg.o

obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o clk-div6.o

# SoC

obj-$(CONFIG_CLK_EMEV2)			+= clk-emev2.o

obj-$(CONFIG_CLK_RZA1)			+= clk-rz.o

obj-$(CONFIG_CLK_R8A73A4)		+= clk-r8a73a4.o

obj-$(CONFIG_CLK_R8A7740)		+= clk-r8a7740.o

obj-$(CONFIG_CLK_R8A7743)		+= r8a7743-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7745)		+= r8a7745-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7778)		+= clk-r8a7778.o

obj-$(CONFIG_CLK_R8A7779)		+= clk-r8a7779.o

obj-$(CONFIG_CLK_R8A7790)		+= r8a7790-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7791)		+= r8a7791-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7792)		+= r8a7792-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7794)		+= r8a7794-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7795)		+= r8a7795-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7796)		+= r8a7796-cpg-mssr.o

obj-$(CONFIG_CLK_SH73A0)		+= clk-sh73a0.o



obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o clk-div6.o

# Family

obj-$(CONFIG_CLK_RCAR_GEN2)		+= clk-rcar-gen2.o

obj-$(CONFIG_CLK_RCAR_GEN2_CPG)		+= rcar-gen2-cpg.o

obj-$(CONFIG_CLK_RCAR_GEN3_CPG)		+= rcar-gen3-cpg.o



# Generic

obj-$(CONFIG_CLK_RENESAS_CPG_MSSR)	+= renesas-cpg-mssr.o

obj-$(CONFIG_CLK_RENESAS_CPG_MSTP)	+= clk-mstp.o

obj-$(CONFIG_CLK_RENESAS_DIV6)		+= clk-div6.o

drivers/clk/renesas/clk-mstp.c

+1 −1
Original line number Diff line number Diff line
@@ -325,7 +325,7 @@ int cpg_mstp_attach_dev(struct generic_pm_domain *unused, struct device *dev) 


void cpg_mstp_detach_dev(struct generic_pm_domain *unused, struct device *dev)

{

	if (!list_empty(&dev->power.subsys_data->clock_list))

	if (!pm_clk_no_clocks(dev))

		pm_clk_destroy(dev);

}