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Commit 4e0397cf authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

OMAPDSS: DISPC: Add IRQ enable/status helpers 



DISPC irqs need to be handled from the compat layer and also in the
future by the omapdrm. To make this possible, this patchs adds a set of
helper functions, so that the irqs can be managed without direct
register reads/writes.

The following functions are added, and all the current direct reg
reads/writes are changed to use these.

u32 dispc_read_irqstatus(void);
void dispc_clear_irqstatus(u32 mask);
u32 dispc_read_irqenable(void);
void dispc_write_irqenable(u32 mask);

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 04bd8ac1

drivers/video/omap2/dss/dispc.c

+32 −12
Original line number Diff line number Diff line
@@ -497,7 +497,7 @@ static void dispc_restore_context(void) 
	if (dss_has_feature(FEAT_MGR_LCD3))

		RR(CONTROL3);

	/* clear spurious SYNC_LOST_DIGIT interrupts */

	dispc_write_reg(DISPC_IRQSTATUS, DISPC_IRQ_SYNC_LOST_DIGIT);

	dispc_clear_irqstatus(DISPC_IRQ_SYNC_LOST_DIGIT);



	/*

	 * enable last so IRQs won't trigger before
@@ -3627,11 +3627,35 @@ int dispc_mgr_get_clock_div(enum omap_channel channel, 
	return 0;

}



u32 dispc_read_irqstatus(void)

{

	return dispc_read_reg(DISPC_IRQSTATUS);

}



void dispc_clear_irqstatus(u32 mask)

{

	dispc_write_reg(DISPC_IRQSTATUS, mask);

}



u32 dispc_read_irqenable(void)

{

	return dispc_read_reg(DISPC_IRQENABLE);

}



void dispc_write_irqenable(u32 mask)

{

	u32 old_mask = dispc_read_reg(DISPC_IRQENABLE);



	/* clear the irqstatus for newly enabled irqs */

	dispc_clear_irqstatus((mask ^ old_mask) & mask);



	dispc_write_reg(DISPC_IRQENABLE, mask);

}



/* dispc.irq_lock has to be locked by the caller */

static void _omap_dispc_set_irqs(void)

{

	u32 mask;

	u32 old_mask;

	int i;

	struct omap_dispc_isr_data *isr_data;
@@ -3646,11 +3670,7 @@ static void _omap_dispc_set_irqs(void) 
		mask |= isr_data->mask;

	}



	old_mask = dispc_read_reg(DISPC_IRQENABLE);

	/* clear the irqstatus for newly enabled irqs */

	dispc_write_reg(DISPC_IRQSTATUS, (mask ^ old_mask) & mask);



	dispc_write_reg(DISPC_IRQENABLE, mask);

	dispc_write_irqenable(mask);

}



int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
@@ -3777,8 +3797,8 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *arg) 


	spin_lock(&dispc.irq_lock);



	irqstatus = dispc_read_reg(DISPC_IRQSTATUS);

	irqenable = dispc_read_reg(DISPC_IRQENABLE);

	irqstatus = dispc_read_irqstatus();

	irqenable = dispc_read_irqenable();



	/* IRQ is not for us */

	if (!(irqstatus & irqenable)) {
@@ -3797,9 +3817,9 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *arg) 


	/* Ack the interrupt. Do it here before clocks are possibly turned

	 * off */

	dispc_write_reg(DISPC_IRQSTATUS, irqstatus);

	dispc_clear_irqstatus(irqstatus);

	/* flush posted write */

	dispc_read_reg(DISPC_IRQSTATUS);

	dispc_read_irqstatus();



	/* make a copy and unlock, so that isrs can unregister

	 * themselves */
@@ -4008,7 +4028,7 @@ static void _omap_dispc_initialize_irq(void) 


	/* there's SYNC_LOST_DIGIT waiting after enabling the DSS,

	 * so clear it */

	dispc_write_reg(DISPC_IRQSTATUS, dispc_read_reg(DISPC_IRQSTATUS));

	dispc_clear_irqstatus(dispc_read_irqstatus());



	_omap_dispc_set_irqs();

drivers/video/omap2/dss/dss.h

+4 −0
Original line number Diff line number Diff line
@@ -397,6 +397,10 @@ void dpi_uninit_platform_driver(void) __exit; 
int dispc_init_platform_driver(void) __init;

void dispc_uninit_platform_driver(void) __exit;

void dispc_dump_clocks(struct seq_file *s);

u32 dispc_read_irqstatus(void);

void dispc_clear_irqstatus(u32 mask);

u32 dispc_read_irqenable(void);

void dispc_write_irqenable(u32 mask);



int dispc_runtime_get(void);

void dispc_runtime_put(void);