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Commit 4e003747 authored by Michael Ellerman's avatar Michael Ellerman
Browse files

powerpc/64s: Replace CONFIG_PPC_STD_MMU_64 with CONFIG_PPC_BOOK3S_64 



CONFIG_PPC_STD_MMU_64 indicates support for the "standard" powerpc MMU
on 64-bit CPUs. The "standard" MMU refers to the hash page table MMU
found in "server" processors, from IBM mainly.

Currently CONFIG_PPC_STD_MMU_64 is == CONFIG_PPC_BOOK3S_64. While it's
annoying to have two symbols that always have the same value, it's not
quite annoying enough to bother removing one.

However with the arrival of Power9, we now have the situation where
CONFIG_PPC_STD_MMU_64 is enabled, but the kernel is running using the
Radix MMU - *not* the "standard" MMU. So it is now actively confusing
to use it, because it implies that code is disabled or inactive when
the Radix MMU is in use, however that is not necessarily true.

So s/CONFIG_PPC_STD_MMU_64/CONFIG_PPC_BOOK3S_64/, and do some minor
formatting updates of some of the affected lines.

This will be a pain for backports, but c'est la vie.

Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent c1807e3f

arch/powerpc/Kconfig

+3 −3
Original line number Diff line number Diff line
@@ -334,7 +334,7 @@ config PPC_OF_PLATFORM_PCI 
	default n



config ARCH_SUPPORTS_DEBUG_PAGEALLOC

	depends on PPC32 || PPC_STD_MMU_64

	depends on PPC32 || PPC_BOOK3S_64

	def_bool y



config ARCH_SUPPORTS_UPROBES
@@ -721,7 +721,7 @@ config PPC_16K_PAGES 


config PPC_64K_PAGES

	bool "64k page size"

	depends on !PPC_FSL_BOOK3E && (44x || PPC_STD_MMU_64 || PPC_BOOK3E_64)

	depends on !PPC_FSL_BOOK3E && (44x || PPC_BOOK3S_64 || PPC_BOOK3E_64)

	select HAVE_ARCH_SOFT_DIRTY if PPC_BOOK3S_64



config PPC_256K_PAGES
@@ -780,7 +780,7 @@ config FORCE_MAX_ZONEORDER 


config PPC_SUBPAGE_PROT

	bool "Support setting protections for 4k subpages"

	depends on PPC_STD_MMU_64 && PPC_64K_PAGES

	depends on PPC_BOOK3S_64 && PPC_64K_PAGES

	help

	  This option adds support for a system call to allow user programs

	  to set access permissions (read/write, readonly, or no access)

arch/powerpc/include/asm/nohash/64/pgtable.h

+1 −1
Original line number Diff line number Diff line
@@ -203,7 +203,7 @@ static inline unsigned long pte_update(struct mm_struct *mm, 
	if (!huge)

		assert_pte_locked(mm, addr);



#ifdef CONFIG_PPC_STD_MMU_64

#ifdef CONFIG_PPC_BOOK3S_64

	if (old & _PAGE_HASHPTE)

		hpte_need_flush(mm, addr, ptep, old, huge);

#endif

arch/powerpc/include/asm/paca.h

+5 −5
Original line number Diff line number Diff line
@@ -91,14 +91,14 @@ struct paca_struct { 
	u8 cpu_start;			/* At startup, processor spins until */

					/* this becomes non-zero. */

	u8 kexec_state;		/* set when kexec down has irqs off */

#ifdef CONFIG_PPC_STD_MMU_64

#ifdef CONFIG_PPC_BOOK3S_64

	struct slb_shadow *slb_shadow_ptr;

	struct dtl_entry *dispatch_log;

	struct dtl_entry *dispatch_log_end;

#endif /* CONFIG_PPC_STD_MMU_64 */

#endif

	u64 dscr_default;		/* per-CPU default DSCR */



#ifdef CONFIG_PPC_STD_MMU_64

#ifdef CONFIG_PPC_BOOK3S_64

	/*

	 * Now, starting in cacheline 2, the exception save areas

	 */
@@ -110,7 +110,7 @@ struct paca_struct { 
	u16 vmalloc_sllp;

	u16 slb_cache_ptr;

	u32 slb_cache[SLB_CACHE_ENTRIES];

#endif /* CONFIG_PPC_STD_MMU_64 */

#endif /* CONFIG_PPC_BOOK3S_64 */



#ifdef CONFIG_PPC_BOOK3E

	u64 exgen[8] __aligned(0x40);
@@ -192,7 +192,7 @@ struct paca_struct { 
	struct stop_sprs stop_sprs;

#endif



#ifdef CONFIG_PPC_STD_MMU_64

#ifdef CONFIG_PPC_BOOK3S_64

	/* Non-maskable exceptions that are not performance critical */

	u64 exnmi[EX_SIZE];	/* used for system reset (nmi) */

	u64 exmc[EX_SIZE];	/* used for machine checks */

arch/powerpc/include/asm/page_64.h

+3 −3
Original line number Diff line number Diff line
@@ -117,21 +117,21 @@ extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start, 
#endif /* __ASSEMBLY__ */

#else

#define slice_init()

#ifdef CONFIG_PPC_STD_MMU_64

#ifdef CONFIG_PPC_BOOK3S_64

#define get_slice_psize(mm, addr)	((mm)->context.user_psize)

#define slice_set_user_psize(mm, psize)		\

do {						\

	(mm)->context.user_psize = (psize);	\

	(mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \

} while (0)

#else /* CONFIG_PPC_STD_MMU_64 */

#else /* !CONFIG_PPC_BOOK3S_64 */

#ifdef CONFIG_PPC_64K_PAGES

#define get_slice_psize(mm, addr)	MMU_PAGE_64K

#else /* CONFIG_PPC_64K_PAGES */

#define get_slice_psize(mm, addr)	MMU_PAGE_4K

#endif /* !CONFIG_PPC_64K_PAGES */

#define slice_set_user_psize(mm, psize)	do { BUG(); } while(0)

#endif /* !CONFIG_PPC_STD_MMU_64 */

#endif /* CONFIG_PPC_BOOK3S_64 */



#define slice_set_range_psize(mm, start, len, psize)	\

	slice_set_user_psize((mm), (psize))

arch/powerpc/include/asm/pgtable-be-types.h

+1 −1
Original line number Diff line number Diff line
@@ -76,7 +76,7 @@ typedef struct { unsigned long pgprot; } pgprot_t; 
 * With hash config 64k pages additionally define a bigger "real PTE" type that

 * gathers the "second half" part of the PTE for pseudo 64k pages

 */

#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)

#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_BOOK3S_64)

typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;

#else

typedef struct { pte_t pte; } real_pte_t;