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Commit 4dbada2b authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Linus Walleij
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gpio: omap: use raw locks for locking 



This patch converts gpio_bank.lock from a spin_lock into a
raw_spin_lock. The call path is to access this lock is always under a
raw_spin_lock, for instance
- __setup_irq() holds &desc->lock with irq off
  + __irq_set_trigger()
   + omap_gpio_irq_type()

- handle_level_irq() (runs with irqs off therefore raw locks)
  + mask_ack_irq()
   + omap_gpio_mask_irq()

This fixes the obvious backtrace on -RT. However the locking vs context
is not and this is not limited to -RT:
- omap_gpio_irq_type() is called with IRQ off and has an conditional
  call to pm_runtime_get_sync() which may sleep. Either it may happen or
  it may not happen but pm_runtime_get_sync() should not be called with
  irqs off.

- omap_gpio_debounce() is holding the lock with IRQs off.
  + omap2_set_gpio_debounce()
   + clk_prepare_enable()
    + clk_prepare() this one might sleep.
  The number of users of gpiod_set_debounce() / gpio_set_debounce()
  looks low but still this is not good.

Acked-by: default avatarJavier Martinez Canillas <javier@dowhile0.org>
Acked-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent d1aceb80

drivers/gpio/gpio-omap.c

+40 −40
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ struct gpio_bank { 
	u32 saved_datain;

	u32 level_mask;

	u32 toggle_mask;

	spinlock_t lock;

	raw_spinlock_t lock;

	struct gpio_chip chip;

	struct clk *dbck;

	u32 mod_usage;
@@ -498,17 +498,17 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type) 
	if (!BANK_USED(bank))

		pm_runtime_get_sync(bank->dev);



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	retval = omap_set_gpio_triggering(bank, offset, type);

	if (retval)

		goto error;

	omap_gpio_init_irq(bank, offset);

	if (!omap_gpio_is_input(bank, offset)) {

		spin_unlock_irqrestore(&bank->lock, flags);

		raw_spin_unlock_irqrestore(&bank->lock, flags);

		retval = -EINVAL;

		goto error;

	}

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))

		irq_set_handler_locked(d, handle_level_irq);
@@ -634,14 +634,14 @@ static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset, 
		return -EINVAL;

	}



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	if (enable)

		bank->context.wake_en |= gpio_bit;

	else

		bank->context.wake_en &= ~gpio_bit;



	writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}
@@ -667,10 +667,10 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) 
	if (!BANK_USED(bank))

		pm_runtime_get_sync(bank->dev);



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	omap_enable_gpio_module(bank, offset);

	bank->mod_usage |= BIT(offset);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}
@@ -680,14 +680,14 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) 
	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);

	unsigned long flags;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	bank->mod_usage &= ~(BIT(offset));

	if (!LINE_USED(bank->irq_usage, offset)) {

		omap_set_gpio_direction(bank, offset, 1);

		omap_clear_gpio_debounce(bank, offset);

	}

	omap_disable_gpio_module(bank, offset);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	/*

	 * If this is the last gpio to be freed in the bank,
@@ -789,7 +789,7 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d) 
	if (!BANK_USED(bank))

		pm_runtime_get_sync(bank->dev);



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);



	if (!LINE_USED(bank->mod_usage, offset))

		omap_set_gpio_direction(bank, offset, 1);
@@ -798,12 +798,12 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d) 
	omap_enable_gpio_module(bank, offset);

	bank->irq_usage |= BIT(offset);



	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

	omap_gpio_unmask_irq(d);



	return 0;

err:

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

	if (!BANK_USED(bank))

		pm_runtime_put(bank->dev);

	return -EINVAL;
@@ -815,7 +815,7 @@ static void omap_gpio_irq_shutdown(struct irq_data *d) 
	unsigned long flags;

	unsigned offset = d->hwirq;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	bank->irq_usage &= ~(BIT(offset));

	omap_set_gpio_irqenable(bank, offset, 0);

	omap_clear_gpio_irqstatus(bank, offset);
@@ -823,7 +823,7 @@ static void omap_gpio_irq_shutdown(struct irq_data *d) 
	if (!LINE_USED(bank->mod_usage, offset))

		omap_clear_gpio_debounce(bank, offset);

	omap_disable_gpio_module(bank, offset);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	/*

	 * If this is the last IRQ to be freed in the bank,
@@ -847,10 +847,10 @@ static void omap_gpio_mask_irq(struct irq_data *d) 
	unsigned offset = d->hwirq;

	unsigned long flags;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	omap_set_gpio_irqenable(bank, offset, 0);

	omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

}



static void omap_gpio_unmask_irq(struct irq_data *d)
@@ -860,7 +860,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d) 
	u32 trigger = irqd_get_trigger_type(d);

	unsigned long flags;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	if (trigger)

		omap_set_gpio_triggering(bank, offset, trigger);
@@ -872,7 +872,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d) 
	}



	omap_set_gpio_irqenable(bank, offset, 1);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

}



/*---------------------------------------------------------------------*/
@@ -885,9 +885,9 @@ static int omap_mpuio_suspend_noirq(struct device *dev) 
					OMAP_MPUIO_GPIO_MASKIT / bank->stride;

	unsigned long		flags;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}
@@ -900,9 +900,9 @@ static int omap_mpuio_resume_noirq(struct device *dev) 
					OMAP_MPUIO_GPIO_MASKIT / bank->stride;

	unsigned long		flags;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	writel_relaxed(bank->context.wake_en, mask_reg);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}
@@ -948,9 +948,9 @@ static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset) 


	bank = container_of(chip, struct gpio_bank, chip);

	reg = bank->base + bank->regs->direction;

	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	dir = !!(readl_relaxed(reg) & BIT(offset));

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

	return dir;

}
@@ -960,9 +960,9 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) 
	unsigned long flags;



	bank = container_of(chip, struct gpio_bank, chip);

	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	omap_set_gpio_direction(bank, offset, 1);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

	return 0;

}
@@ -984,10 +984,10 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) 
	unsigned long flags;



	bank = container_of(chip, struct gpio_bank, chip);

	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	bank->set_dataout(bank, offset, value);

	omap_set_gpio_direction(bank, offset, 0);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

	return 0;

}
@@ -999,9 +999,9 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, 


	bank = container_of(chip, struct gpio_bank, chip);



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	omap2_set_gpio_debounce(bank, offset, debounce);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}
@@ -1012,9 +1012,9 @@ static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 
	unsigned long flags;



	bank = container_of(chip, struct gpio_bank, chip);

	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);

	bank->set_dataout(bank, offset, value);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);

}



/*---------------------------------------------------------------------*/
@@ -1210,7 +1210,7 @@ static int omap_gpio_probe(struct platform_device *pdev) 
	else

		bank->set_dataout = omap_set_gpio_dataout_mask;



	spin_lock_init(&bank->lock);

	raw_spin_lock_init(&bank->lock);



	/* Static mapping, never released */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1268,7 +1268,7 @@ static int omap_gpio_runtime_suspend(struct device *dev) 
	unsigned long flags;

	u32 wake_low, wake_hi;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);



	/*

	 * Only edges can generate a wakeup event to the PRCM.
@@ -1321,7 +1321,7 @@ static int omap_gpio_runtime_suspend(struct device *dev) 
				bank->get_context_loss_count(bank->dev);



	omap_gpio_dbck_disable(bank);

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}
@@ -1336,7 +1336,7 @@ static int omap_gpio_runtime_resume(struct device *dev) 
	unsigned long flags;

	int c;



	spin_lock_irqsave(&bank->lock, flags);

	raw_spin_lock_irqsave(&bank->lock, flags);



	/*

	 * On the first resume during the probe, the context has not
@@ -1372,14 +1372,14 @@ static int omap_gpio_runtime_resume(struct device *dev) 
			if (c != bank->context_loss_count) {

				omap_gpio_restore_context(bank);

			} else {

				spin_unlock_irqrestore(&bank->lock, flags);

				raw_spin_unlock_irqrestore(&bank->lock, flags);

				return 0;

			}

		}

	}



	if (!bank->workaround_enabled) {

		spin_unlock_irqrestore(&bank->lock, flags);

		raw_spin_unlock_irqrestore(&bank->lock, flags);

		return 0;

	}
@@ -1434,7 +1434,7 @@ static int omap_gpio_runtime_resume(struct device *dev) 
	}



	bank->workaround_enabled = false;

	spin_unlock_irqrestore(&bank->lock, flags);

	raw_spin_unlock_irqrestore(&bank->lock, flags);



	return 0;

}