Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4d7dff2b authored by Jason Gunthorpe's avatar Jason Gunthorpe
Browse files

Merge branch 'icrc-counter' into rdma.git for-next 

For dependencies, branch based on 'mellanox/mlx5-next' of
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git

Pull RoCE ICRC counters from Leon Romanovsky:

====================
This series exposes RoCE ICRC counter through existing RDMA hw_counters
sysfs interface.

The first patch has all HW definitions in mlx5_ifc.h file and second patch
is the actual counter implementation.
====================

* branch 'icrc-counter':
  IB/mlx5: Support RoCE ICRC encapsulated error counter
  net/mlx5: Add RoCE RX ICRC encapsulated counter
parents cfdeb893 9f876f3d

drivers/infiniband/hw/mlx5/cmd.c

+12 −0
Original line number Diff line number Diff line
@@ -170,3 +170,15 @@ int mlx5_cmd_dealloc_memic(struct mlx5_memic *memic, u64 addr, u64 length) 


	return err;

}



int mlx5_cmd_query_ext_ppcnt_counters(struct mlx5_core_dev *dev, void *out)

{

	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {};

	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);



	MLX5_SET(ppcnt_reg, in, local_port, 1);



	MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP);

	return  mlx5_core_access_reg(dev, in, sz, out, sz, MLX5_REG_PPCNT,

				     0, 0);

}

drivers/infiniband/hw/mlx5/cmd.h

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey);

int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,

			       void *out, int out_size);

int mlx5_cmd_query_ext_ppcnt_counters(struct mlx5_core_dev *dev, void *out);

int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *mdev,

				void *in, int in_size);

int mlx5_cmd_alloc_memic(struct mlx5_memic *memic, phys_addr_t *addr,

drivers/infiniband/hw/mlx5/main.c

+59 −3
Original line number Diff line number Diff line
@@ -4677,6 +4677,15 @@ static const struct mlx5_ib_counter extended_err_cnts[] = { 
	INIT_Q_COUNTER(req_cqe_flush_error),

};



#define INIT_EXT_PPCNT_COUNTER(_name)		\

	{ .name = #_name, .offset =	\

	MLX5_BYTE_OFF(ppcnt_reg, \

		      counter_set.eth_extended_cntrs_grp_data_layout._name##_high)}



static const struct mlx5_ib_counter ext_ppcnt_cnts[] = {

	INIT_EXT_PPCNT_COUNTER(rx_icrc_encapsulated),

};



static void mlx5_ib_dealloc_counters(struct mlx5_ib_dev *dev)

{

	int i;
@@ -4712,7 +4721,10 @@ static int __mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev, 
		cnts->num_cong_counters = ARRAY_SIZE(cong_cnts);

		num_counters += ARRAY_SIZE(cong_cnts);

	}



	if (MLX5_CAP_PCAM_FEATURE(dev->mdev, rx_icrc_encapsulated_counter)) {

		cnts->num_ext_ppcnt_counters = ARRAY_SIZE(ext_ppcnt_cnts);

		num_counters += ARRAY_SIZE(ext_ppcnt_cnts);

	}

	cnts->names = kcalloc(num_counters, sizeof(cnts->names), GFP_KERNEL);

	if (!cnts->names)

		return -ENOMEM;
@@ -4769,6 +4781,13 @@ static void mlx5_ib_fill_counters(struct mlx5_ib_dev *dev, 
			offsets[j] = cong_cnts[i].offset;

		}

	}



	if (MLX5_CAP_PCAM_FEATURE(dev->mdev, rx_icrc_encapsulated_counter)) {

		for (i = 0; i < ARRAY_SIZE(ext_ppcnt_cnts); i++, j++) {

			names[j] = ext_ppcnt_cnts[i].name;

			offsets[j] = ext_ppcnt_cnts[i].offset;

		}

	}

}



static int mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev)
@@ -4814,7 +4833,8 @@ static struct rdma_hw_stats *mlx5_ib_alloc_hw_stats(struct ib_device *ibdev, 


	return rdma_alloc_hw_stats_struct(port->cnts.names,

					  port->cnts.num_q_counters +

					  port->cnts.num_cong_counters,

					  port->cnts.num_cong_counters +

					  port->cnts.num_ext_ppcnt_counters,

					  RDMA_HW_STATS_DEFAULT_LIFESPAN);

}
@@ -4847,6 +4867,34 @@ static int mlx5_ib_query_q_counters(struct mlx5_core_dev *mdev, 
	return ret;

}



static int mlx5_ib_query_ext_ppcnt_counters(struct mlx5_ib_dev *dev,

					  struct mlx5_ib_port *port,

					  struct rdma_hw_stats *stats)

{

	int offset = port->cnts.num_q_counters + port->cnts.num_cong_counters;

	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);

	int ret, i;

	void *out;



	out = kvzalloc(sz, GFP_KERNEL);

	if (!out)

		return -ENOMEM;



	ret = mlx5_cmd_query_ext_ppcnt_counters(dev->mdev, out);

	if (ret)

		goto free;



	for (i = 0; i < port->cnts.num_ext_ppcnt_counters; i++) {

		stats->value[i + offset] =

			be64_to_cpup((__be64 *)(out +

				    port->cnts.offsets[i + offset]));

	}



free:

	kvfree(out);

	return ret;

}



static int mlx5_ib_get_hw_stats(struct ib_device *ibdev,

				struct rdma_hw_stats *stats,

				u8 port_num, int index)
@@ -4860,13 +4908,21 @@ static int mlx5_ib_get_hw_stats(struct ib_device *ibdev, 
	if (!stats)

		return -EINVAL;



	num_counters = port->cnts.num_q_counters + port->cnts.num_cong_counters;

	num_counters = port->cnts.num_q_counters +

		       port->cnts.num_cong_counters +

		       port->cnts.num_ext_ppcnt_counters;



	/* q_counters are per IB device, query the master mdev */

	ret = mlx5_ib_query_q_counters(dev->mdev, port, stats);

	if (ret)

		return ret;



	if (MLX5_CAP_PCAM_FEATURE(dev->mdev, rx_icrc_encapsulated_counter)) {

		ret =  mlx5_ib_query_ext_ppcnt_counters(dev, port, stats);

		if (ret)

			return ret;

	}



	if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {

		mdev = mlx5_ib_get_native_port_mdev(dev, port_num,

						    &mdev_port_num);

drivers/infiniband/hw/mlx5/mlx5_ib.h

+1 −0
Original line number Diff line number Diff line
@@ -666,6 +666,7 @@ struct mlx5_ib_counters { 
	size_t *offsets;

	u32 num_q_counters;

	u32 num_cong_counters;

	u32 num_ext_ppcnt_counters;

	u16 set_id;

	bool set_id_valid;

};

include/linux/mlx5/mlx5_ifc.h

+8 −3
Original line number Diff line number Diff line
@@ -1685,7 +1685,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits { 


	u8         rx_buffer_full_low[0x20];



	u8         reserved_at_1c0[0x600];

	u8         rx_icrc_encapsulated_high[0x20];



	u8         rx_icrc_encapsulated_low[0x20];



	u8         reserved_at_200[0x5c0];

};



struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
@@ -8048,8 +8052,9 @@ struct mlx5_ifc_peir_reg_bits { 
};



struct mlx5_ifc_pcam_enhanced_features_bits {

	u8         reserved_at_0[0x76];



	u8         reserved_at_0[0x6d];

	u8         rx_icrc_encapsulated_counter[0x1];

	u8	   reserved_at_6e[0x8];

	u8         pfcc_mask[0x1];

	u8         reserved_at_77[0x4];

	u8         rx_buffer_fullness_counters[0x1];