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Commit 4d295db0 authored by Eilon Greenstein's avatar Eilon Greenstein Committed by David S. Miller
Browse files

bnx2x: Supporting BCM8727 PHY



Adding support for BCM8727 - a dual port SFP+ PHY. That includes verification of
the optic module vendor and part number - the list of approved modules resides
on the nvram and the module is verified by the FW. Since not all users would
like to use this verification feature, it can be disabled. The default behavior
is to issue a warning if the module is not approved, but still allow using it -
but it is also possible to disable the link if the module is not approved.

Signed-off-by: default avatarYaniv Rosner <yanivr@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5316bc0b
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+1 −0
Original line number Diff line number Diff line
@@ -1006,6 +1006,7 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port);
int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
u32 bnx2x_fw_command(struct bnx2x *bp, u32 command);

static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
			   int wait)
+21 −4
Original line number Diff line number Diff line
@@ -248,6 +248,8 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726	    0x00000600
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481	    0x00000700
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101	    0x00000800
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727	    0x00000900
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727_NOC   0x00000a00
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE	    0x0000fd00
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN	    0x0000ff00

@@ -358,10 +360,16 @@ struct port_feat_cfg { /* port 0: 0x454 port 1: 0x4c8 */
#define PORT_FEATURE_MBA_ENABLED		    0x02000000
#define PORT_FEATURE_MFW_ENABLED		    0x04000000

	/*  Check the optic vendor via i2c before allowing it to be used by
	  SW */
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLED 	      0x00000000
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_ENABLED		      0x08000000
	/* Reserved bits: 28-29 */
	/*  Check the optic vendor via i2c against a list of approved modules
	  in a separate nvram image */
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK		      0xE0000000
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_SHIFT		      29
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_NO_ENFORCEMENT	      0x00000000
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER       0x20000000
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_WARNING_MSG	      0x40000000
#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_POWER_DOWN	      0x60000000


	u32 wol_config;
	/* Default is used when driver sets to "auto" mode */
@@ -657,6 +665,12 @@ struct drv_func_mb {
#define DRV_MSG_CODE_GET_UPGRADE_KEY			0x81000000
#define DRV_MSG_CODE_GET_MANUF_KEY			0x82000000
#define DRV_MSG_CODE_LOAD_L2B_PRAM			0x90000000
	/*
	 * The optic module verification commands requris bootcode
	 * v5.0.6 or later
	 */
#define DRV_MSG_CODE_VRFY_OPT_MDL			0xa0000000
#define REQ_BC_VER_4_VRFY_OPT_MDL			0x00050006

#define BIOS_MSG_CODE_LIC_CHALLENGE			0xff010000
#define BIOS_MSG_CODE_LIC_RESPONSE			0xff020000
@@ -691,6 +705,9 @@ struct drv_func_mb {
#define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE		0x90220000
#define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE		0x90230000
#define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE		0x90240000
#define FW_MSG_CODE_VRFY_OPT_MDL_SUCCESS		0xa0100000
#define FW_MSG_CODE_VRFY_OPT_MDL_INVLD_IMG		0xa0200000
#define FW_MSG_CODE_VRFY_OPT_MDL_UNAPPROVED		0xa0300000

#define FW_MSG_CODE_LIC_CHALLENGE			0xff010000
#define FW_MSG_CODE_LIC_RESPONSE			0xff020000
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