Commit 4cb53a23 authored Apr 07, 2016 by Roger Quadros Committed by Tony Lindgren Apr 12, 2016

ARM: dts: omap3-beagle: Provide NAND ready pin



On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.

For NAND we don't use GPMC wait pin monitoring but
get the NAND Ready/Busy# status using GPIOlib.
GPMC driver provides the WAIT0 pin status over GPIOlib.

Read speed increases from 13212 KiB/ to 15753 KiB/s
and write speed was unchanged at 4404 KiB/s.

Measured using mtd_speedtest.ko on omap3-beagle-c4.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

parent 63015d73

arch/arm/boot/dts/omap3-beagle.dts

+1 −0

Original line number	Diff line number	Diff line
		@@ -390,6 +390,7 @@
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
		<1 IRQ_TYPE_NONE>; /* termcount */
		ti,nand-ecc-opt = "ham1";
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		nand-bus-width = <16>;
		#address-cells = <1>;
		#size-cells = <1>;