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Commit 4c2245bb authored by Gavin Shan's avatar Gavin Shan Committed by Bjorn Helgaas
Browse files

powerpc/PCI: Override pcibios_window_alignment() 



This patch implements pcibios_window_alignment() so powerpc platforms can
force P2P bridge windows to be at larger alignments than the PCI spec
requires.

[bhelgaas: changelog]
Signed-off-by: default avatarGavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent c121504e

arch/powerpc/include/asm/machdep.h

+3 −0
Original line number Diff line number Diff line
@@ -214,6 +214,9 @@ struct machdep_calls { 
	/* Called after scan and before resource survey */

	void (*pcibios_fixup_phb)(struct pci_controller *hose);



	/* Called during PCI resource reassignment */

	resource_size_t (*pcibios_window_alignment)(struct pci_bus *, unsigned long type);



	/* Called to shutdown machine specific hardware not already controlled

	 * by other drivers.

	 */

arch/powerpc/kernel/pci-common.c

+20 −0
Original line number Diff line number Diff line
@@ -99,6 +99,26 @@ void pcibios_free_controller(struct pci_controller *phb) 
		kfree(phb);

}



/*

 * The function is used to return the minimal alignment

 * for memory or I/O windows of the associated P2P bridge.

 * By default, 4KiB alignment for I/O windows and 1MiB for

 * memory windows.

 */

resource_size_t pcibios_window_alignment(struct pci_bus *bus,

					 unsigned long type)

{

	if (ppc_md.pcibios_window_alignment)

		return ppc_md.pcibios_window_alignment(bus, type);



	/*

	 * PCI core will figure out the default

	 * alignment: 4KiB for I/O and 1MiB for

	 * memory window.

	 */

	return 1;

}



static resource_size_t pcibios_io_size(const struct pci_controller *hose)

{

#ifdef CONFIG_PPC64