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Commit 4bfe6b68 authored by Zhenyu Wang's avatar Zhenyu Wang Committed by Eric Anholt
Browse files

drm/i915: Fix and cleanup DPLL calculation for Ironlake 



When the ideal error range can't be reached, this will safely use
a most closed one. Clean up some dumb codes in DPLL function too.

This fixes DPLL clock issue against one monitor at 1680x1050@60hz.

Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent ba86bf8b

drivers/gpu/drm/i915/intel_display.c

+6 −9
Original line number Diff line number Diff line
@@ -863,10 +863,8 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 
	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	intel_clock_t clock;

	int max_n;

	bool found;

	int err_most = 47;

	found = false;

	int err_min = 10000;



	/* eDP has only 2 clock choice, no n/m/p setting */

	if (HAS_eDP)
@@ -890,10 +888,9 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 
	}



	memset(best_clock, 0, sizeof(*best_clock));

	max_n = limit->n.max;

	for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {

		/* based on hardware requriment prefer smaller n to precision */

		for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {

		for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) {

			/* based on hardware requirment prefere larger m1,m2 */

			for (clock.m1 = limit->m1.max;

			     clock.m1 >= limit->m1.min; clock.m1--) {
@@ -907,18 +904,18 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 
					this_err = abs((10000 - (target*10000/clock.dot)));

					if (this_err < err_most) {

						*best_clock = clock;

						err_most = this_err;

						max_n = clock.n;

						found = true;

						/* found on first matching */

						goto out;

					} else if (this_err < err_min) {

						*best_clock = clock;

						err_min = this_err;

					}

				}

			}

		}

	}

out:

	return found;

	return true;

}



/* DisplayPort has only two frequencies, 162MHz and 270MHz */