Loading arch/arm/boot/dts/da850.dtsi +23 −1 Original line number Diff line number Diff line Loading @@ -120,7 +120,19 @@ 0x4 0x00000004 0x0000000f >; }; spi1_pins: pinmux_spi_pins { spi0_pins: pinmux_spi0_pins { pinctrl-single,bits = < /* SIMO, SOMI, CLK */ 0xc 0x00001101 0x0000ff0f >; }; spi0_cs0_pin: pinmux_spi0_cs0 { pinctrl-single,bits = < /* CS0 */ 0x10 0x00000010 0x000000f0 >; }; spi1_pins: pinmux_spi1_pins { pinctrl-single,bits = < /* SIMO, SOMI, CLK */ 0x14 0x00110100 0x00ff0f00 Loading Loading @@ -291,6 +303,16 @@ reg = <0x308000 0x80>; status = "disabled"; }; spi0: spi@41000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,da830-spi"; reg = <0x41000 0x1000>; num-cs = <6>; ti,davinci-spi-intr-line = <1>; interrupts = <20>; status = "disabled"; }; spi1: spi@30e000 { #address-cells = <1>; #size-cells = <0>; Loading Loading
arch/arm/boot/dts/da850.dtsi +23 −1 Original line number Diff line number Diff line Loading @@ -120,7 +120,19 @@ 0x4 0x00000004 0x0000000f >; }; spi1_pins: pinmux_spi_pins { spi0_pins: pinmux_spi0_pins { pinctrl-single,bits = < /* SIMO, SOMI, CLK */ 0xc 0x00001101 0x0000ff0f >; }; spi0_cs0_pin: pinmux_spi0_cs0 { pinctrl-single,bits = < /* CS0 */ 0x10 0x00000010 0x000000f0 >; }; spi1_pins: pinmux_spi1_pins { pinctrl-single,bits = < /* SIMO, SOMI, CLK */ 0x14 0x00110100 0x00ff0f00 Loading Loading @@ -291,6 +303,16 @@ reg = <0x308000 0x80>; status = "disabled"; }; spi0: spi@41000 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,da830-spi"; reg = <0x41000 0x1000>; num-cs = <6>; ti,davinci-spi-intr-line = <1>; interrupts = <20>; status = "disabled"; }; spi1: spi@30e000 { #address-cells = <1>; #size-cells = <0>; Loading