Commit 4ba55e65 authored Sep 17, 2017 by Andy Lutomirski Committed by Ingo Molnar Sep 17, 2017

x86/mm/32: Load a sane CR3 before cpu_init() on secondary CPUs



For unknown historical reasons (i.e. Borislav doesn't recall),
32-bit kernels invoke cpu_init() on secondary CPUs with
initial_page_table loaded into CR3.  Then they set
current->active_mm to &init_mm and call enter_lazy_tlb() before
fixing CR3.  This means that the x86 TLB code gets invoked while CR3
is inconsistent, and, with the improved PCID sanity checks I added,
we warn.

Fix it by loading swapper_pg_dir (i.e. init_mm.pgd) earlier.

Reported-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bpetkov@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: 72c0098d ("x86/mm: Reinitialize TLB state on hotplug and resume")
Link: http://lkml.kernel.org/r/30cdfea504682ba3b9012e77717800a91c22097f.1505663533.git.luto@kernel.org


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent b8b7abae

arch/x86/kernel/smpboot.c

+7 −6

Original line number	Diff line number	Diff line
		@@ -232,12 +232,6 @@ static void notrace start_secondary(void *unused)
		*/
		if (boot_cpu_has(X86_FEATURE_PCID))
		__write_cr4(__read_cr4() \| X86_CR4_PCIDE);
		cpu_init();
		x86_cpuinit.early_percpu_clock_init();
		preempt_disable();
		smp_callin();

		enable_start_cpu0 = 0;

		#ifdef CONFIG_X86_32
		/* switch away from the initial page table */
		@@ -245,6 +239,13 @@ static void notrace start_secondary(void *unused)
		__flush_tlb_all();
		#endif

		cpu_init();
		x86_cpuinit.early_percpu_clock_init();
		preempt_disable();
		smp_callin();

		enable_start_cpu0 = 0;

		/* otherwise gcc will move up smp_processor_id before the cpu_init */
		barrier();
		/*