Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4b83873d authored by Joerg Roedel's avatar Joerg Roedel
Browse files

x86/gart: Disable GART explicitly before initialization 



If we boot into a crash-kernel the gart might still be
enabled and its caches might be dirty. This can result in
undefined behavior later. Fix it by explicitly disabling the
gart hardware before initialization and flushing the caches
after enablement.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
parent 39a37ce1

arch/x86/kernel/aperture_64.c

+14 −1
Original line number Diff line number Diff line
@@ -393,6 +393,7 @@ void __init gart_iommu_hole_init(void) 
	for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {

		int bus;

		int dev_base, dev_limit;

		u32 ctl;



		bus = bus_dev_ranges[i].bus;

		dev_base = bus_dev_ranges[i].dev_base;
@@ -406,7 +407,19 @@ void __init gart_iommu_hole_init(void) 
			gart_iommu_aperture = 1;

			x86_init.iommu.iommu_init = gart_iommu_init;



			aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7;

			ctl = read_pci_config(bus, slot, 3,

					      AMD64_GARTAPERTURECTL);



			/*

			 * Before we do anything else disable the GART. It may

			 * still be enabled if we boot into a crash-kernel here.

			 * Reconfiguring the GART while it is enabled could have

			 * unknown side-effects.

			 */

			ctl &= ~GARTEN;

			write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl);



			aper_order = (ctl >> 1) & 7;

			aper_size = (32 * 1024 * 1024) << aper_order;

			aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;

			aper_base <<= 25;

arch/x86/kernel/pci-gart_64.c

+3 −0
Original line number Diff line number Diff line
@@ -564,6 +564,9 @@ static void enable_gart_translations(void) 


		enable_gart_translation(dev, __pa(agp_gatt_table));

	}



	/* Flush the GART-TLB to remove stale entries */

	k8_flush_garts();

}



/*