Commit 4b1e8427 authored Feb 21, 2018 by Borislav Petkov Committed by Ingo Molnar Feb 21, 2018

x86/mce/AMD: Collect error info even if valid bits are not set



The MCA banks log error info into MCA_ADDR, MCA_MISC0, and MCA_SYND even
if the corresponding valid bits are not set:

"Error handlers should save the values in MCA_ADDR, MCA_MISC0,
and MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
MCA_STATUS[SyndV] are zero."

Do so by setting those bits so that code down the MCE processing path
doesn't need to be changed.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20180221101900.10326-5-bp@alien8.de


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent b2fbf6f2

arch/x86/kernel/cpu/mcheck/mce.c

+14 −0

Original line number	Diff line number	Diff line
		@@ -441,6 +441,20 @@ static inline void mce_gather_info(struct mce m, struct pt_regs regs)
		if (mca_cfg.rip_msr)
		m->ip = mce_rdmsrl(mca_cfg.rip_msr);
		}

		/*
		* Error handlers should save the values in MCA_ADDR, MCA_MISC0, and
		* MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
		* MCA_STATUS[SyndV] are zero.
		*/
		if (m->cpuvendor == X86_VENDOR_AMD) {
		u64 status = MCI_STATUS_ADDRV \| MCI_STATUS_MISCV;

		if (mce_flags.smca)
		status \|= MCI_STATUS_SYNDV;

		m->status \|= status;
		}
		}

		int mce_available(struct cpuinfo_x86 *c)