Commit 4aa6c99d authored Sep 30, 2016 by Gregory CLEMENT Committed by Stephen Boyd Oct 17, 2016

clk: mvebu: armada-37xx-periph: Fix the clock gate flag

For the gate part of the peripheral clock setting the bit disables the
clock and clearing it enables the clock. This is not the default behavior
of clk_gate component, so we need to use the CLK_GATE_SET_TO_DISABLE flag.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Fixes: 8ca4746a ("clk: mvebu: Add the peripheral clock driver for Armada 3700")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

parent c4e634ce

drivers/clk/mvebu/armada-37xx-periph.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -329,6 +329,7 @@ static int armada_3700_add_composite_clk(const struct clk_periph_data *data,
		gate->lock = lock;
		gate_ops = gate_hw->init->ops;
		gate->reg = reg + (u64)gate->reg;
		gate->flags = CLK_GATE_SET_TO_DISABLE;
		}

		if (data->rate_hw) {