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Commit 4a92b6d7 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Andy Gross
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arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE() 



GICv3 does not have affinity bitmap in the binding for PPI
interrupts. It can be specified using a 4th cell if needed
as documented in the bindings. Clean up the wrong use of the
affinity bitmap using the GIC_CPU_MASK_SIMPLE() macro

Reported-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 7928b2cb

arch/arm64/boot/dts/qcom/msm8996.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -232,10 +232,10 @@ 


	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;

	};



	clocks {