Loading arch/mips/cavium-octeon/octeon-irq.c +2 −1 Original line number Original line Diff line number Diff line Loading @@ -15,7 +15,6 @@ DEFINE_RWLOCK(octeon_irq_ciu0_rwlock); DEFINE_RWLOCK(octeon_irq_ciu0_rwlock); DEFINE_RWLOCK(octeon_irq_ciu1_rwlock); DEFINE_RWLOCK(octeon_irq_ciu1_rwlock); DEFINE_SPINLOCK(octeon_irq_msi_lock); static int octeon_coreid_for_cpu(int cpu) static int octeon_coreid_for_cpu(int cpu) { { Loading Loading @@ -545,6 +544,8 @@ static struct irq_chip octeon_irq_chip_ciu1 = { #ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI static DEFINE_SPINLOCK(octeon_irq_msi_lock); static void octeon_irq_msi_ack(unsigned int irq) static void octeon_irq_msi_ack(unsigned int irq) { { if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) { if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) { Loading arch/mips/dec/kn01-berr.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -46,7 +46,7 @@ * There is no default value -- it has to be initialized. * There is no default value -- it has to be initialized. */ */ u16 cached_kn01_csr; u16 cached_kn01_csr; DEFINE_SPINLOCK(kn01_lock); static DEFINE_SPINLOCK(kn01_lock); static inline void dec_kn01_be_ack(void) static inline void dec_kn01_be_ack(void) Loading arch/mips/include/asm/dec/kn01.h +0 −1 Original line number Original line Diff line number Diff line Loading @@ -80,7 +80,6 @@ struct pt_regs; struct pt_regs; extern u16 cached_kn01_csr; extern u16 cached_kn01_csr; extern spinlock_t kn01_lock; extern void dec_kn01_be_init(void); extern void dec_kn01_be_init(void); extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); Loading arch/mips/oprofile/op_model_loongson2.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -47,7 +47,7 @@ static struct loongson2_register_config { int cnt1_enabled, cnt2_enabled; int cnt1_enabled, cnt2_enabled; } reg; } reg; DEFINE_SPINLOCK(sample_lock); static DEFINE_SPINLOCK(sample_lock); static char *oprofid = "LoongsonPerf"; static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); Loading arch/mips/pci/ops-pmcmsp.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -206,7 +206,7 @@ static void pci_proc_init(void) } } #endif /* CONFIG_PROC_FS && PCI_COUNTERS */ #endif /* CONFIG_PROC_FS && PCI_COUNTERS */ DEFINE_SPINLOCK(bpci_lock); static DEFINE_SPINLOCK(bpci_lock); /***************************************************************************** /***************************************************************************** * * Loading Loading
arch/mips/cavium-octeon/octeon-irq.c +2 −1 Original line number Original line Diff line number Diff line Loading @@ -15,7 +15,6 @@ DEFINE_RWLOCK(octeon_irq_ciu0_rwlock); DEFINE_RWLOCK(octeon_irq_ciu0_rwlock); DEFINE_RWLOCK(octeon_irq_ciu1_rwlock); DEFINE_RWLOCK(octeon_irq_ciu1_rwlock); DEFINE_SPINLOCK(octeon_irq_msi_lock); static int octeon_coreid_for_cpu(int cpu) static int octeon_coreid_for_cpu(int cpu) { { Loading Loading @@ -545,6 +544,8 @@ static struct irq_chip octeon_irq_chip_ciu1 = { #ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI static DEFINE_SPINLOCK(octeon_irq_msi_lock); static void octeon_irq_msi_ack(unsigned int irq) static void octeon_irq_msi_ack(unsigned int irq) { { if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) { if (!octeon_has_feature(OCTEON_FEATURE_PCIE)) { Loading
arch/mips/dec/kn01-berr.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -46,7 +46,7 @@ * There is no default value -- it has to be initialized. * There is no default value -- it has to be initialized. */ */ u16 cached_kn01_csr; u16 cached_kn01_csr; DEFINE_SPINLOCK(kn01_lock); static DEFINE_SPINLOCK(kn01_lock); static inline void dec_kn01_be_ack(void) static inline void dec_kn01_be_ack(void) Loading
arch/mips/include/asm/dec/kn01.h +0 −1 Original line number Original line Diff line number Diff line Loading @@ -80,7 +80,6 @@ struct pt_regs; struct pt_regs; extern u16 cached_kn01_csr; extern u16 cached_kn01_csr; extern spinlock_t kn01_lock; extern void dec_kn01_be_init(void); extern void dec_kn01_be_init(void); extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); Loading
arch/mips/oprofile/op_model_loongson2.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -47,7 +47,7 @@ static struct loongson2_register_config { int cnt1_enabled, cnt2_enabled; int cnt1_enabled, cnt2_enabled; } reg; } reg; DEFINE_SPINLOCK(sample_lock); static DEFINE_SPINLOCK(sample_lock); static char *oprofid = "LoongsonPerf"; static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); Loading
arch/mips/pci/ops-pmcmsp.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -206,7 +206,7 @@ static void pci_proc_init(void) } } #endif /* CONFIG_PROC_FS && PCI_COUNTERS */ #endif /* CONFIG_PROC_FS && PCI_COUNTERS */ DEFINE_SPINLOCK(bpci_lock); static DEFINE_SPINLOCK(bpci_lock); /***************************************************************************** /***************************************************************************** * * Loading