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Commit 48387f0c authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Ben Skeggs
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drm/nouveau/secboot: support running ACR on SEC



Add support for running the ACR binary on the SEC falcon.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent c3433603
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+2 −1
Original line number Diff line number Diff line
@@ -30,7 +30,8 @@ enum nvkm_secboot_falcon {
	NVKM_SECBOOT_FALCON_RESERVED = 1,
	NVKM_SECBOOT_FALCON_FECS = 2,
	NVKM_SECBOOT_FALCON_GPCCS = 3,
	NVKM_SECBOOT_FALCON_END = 4,
	NVKM_SECBOOT_FALCON_SEC2 = 7,
	NVKM_SECBOOT_FALCON_END = 8,
	NVKM_SECBOOT_FALCON_INVALID = 0xffffffff,
};

+15 −3
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@
#include <subdev/mc.h>
#include <subdev/pmu.h>
#include <core/msgqueue.h>
#include <engine/sec2.h>

/**
 * struct hsf_fw_header - HS firmware descriptor
@@ -1017,7 +1018,7 @@ acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot *sb,
	       enum nvkm_secboot_falcon falcon)
{
	struct acr_r352 *acr = acr_r352(_acr);
	struct nvkm_pmu *pmu = sb->subdev.device->pmu;
	struct nvkm_msgqueue *queue;
	const char *fname = nvkm_secboot_falcon_name[falcon];
	bool wpr_already_set = sb->wpr_set;
	int ret;
@@ -1037,9 +1038,20 @@ acr_r352_reset(struct nvkm_acr *_acr, struct nvkm_secboot *sb,
			return ret;
	}

	/* Otherwise just ask the PMU to reset the falcon */
	switch (_acr->boot_falcon) {
	case NVKM_SECBOOT_FALCON_PMU:
		queue = sb->subdev.device->pmu->queue;
		break;
	case NVKM_SECBOOT_FALCON_SEC2:
		queue = sb->subdev.device->sec2->queue;
		break;
	default:
		return -EINVAL;
	}

	/* Otherwise just ask the LS firmware to reset the falcon */
	nvkm_debug(&sb->subdev, "resetting %s falcon\n", fname);
	ret = nvkm_msgqueue_acr_boot_falcon(pmu->queue, falcon);
	ret = nvkm_msgqueue_acr_boot_falcon(queue, falcon);
	if (ret) {
		nvkm_error(&sb->subdev, "cannot boot %s falcon\n", fname);
		return ret;
+8 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@
#include <subdev/mc.h>
#include <subdev/timer.h>
#include <subdev/pmu.h>
#include <engine/sec2.h>

const char *
nvkm_secboot_falcon_name[] = {
@@ -94,6 +95,7 @@ nvkm_secboot_falcon_name[] = {
	[NVKM_SECBOOT_FALCON_RESERVED] = "<reserved>",
	[NVKM_SECBOOT_FALCON_FECS] = "FECS",
	[NVKM_SECBOOT_FALCON_GPCCS] = "GPCCS",
	[NVKM_SECBOOT_FALCON_SEC2] = "SEC2",
	[NVKM_SECBOOT_FALCON_END] = "<invalid>",
};
/**
@@ -133,11 +135,17 @@ nvkm_secboot_oneinit(struct nvkm_subdev *subdev)
	case NVKM_SECBOOT_FALCON_PMU:
		sb->boot_falcon = subdev->device->pmu->falcon;
		break;
	case NVKM_SECBOOT_FALCON_SEC2:
		/* we must keep SEC2 alive forever since ACR will run on it */
		nvkm_engine_ref(&subdev->device->sec2->engine);
		sb->boot_falcon = subdev->device->sec2->falcon;
		break;
	default:
		nvkm_error(subdev, "Unmanaged boot falcon %s!\n",
			                nvkm_secboot_falcon_name[sb->acr->boot_falcon]);
		return -EINVAL;
	}
	nvkm_debug(subdev, "using %s falcon for ACR\n", sb->boot_falcon->name);

	/* Call chip-specific init function */
	if (sb->func->oneinit)