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Commit 47ac3199 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'upstream-davem' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

parents 608961a5 99324590
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+2 −4
Original line number Diff line number Diff line
@@ -2104,12 +2104,10 @@ L: netdev@vger.kernel.org
S:	Maintained

INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/ixgb/ixgbe)
P:	Auke Kok
M:	auke-jan.h.kok@intel.com
P:	Jesse Brandeburg
M:	jesse.brandeburg@intel.com
P:	Jeff Kirsher
M:	jeffrey.t.kirsher@intel.com
P:	Jesse Brandeburg
M:	jesse.brandeburg@intel.com
P:	Bruce Allan
M:	bruce.w.allan@intel.com
P:	John Ronciak
+2 −0
Original line number Diff line number Diff line
@@ -53,11 +53,13 @@ int register_memory_notifier(struct notifier_block *nb)
{
        return blocking_notifier_chain_register(&memory_chain, nb);
}
EXPORT_SYMBOL(register_memory_notifier);

void unregister_memory_notifier(struct notifier_block *nb)
{
        blocking_notifier_chain_unregister(&memory_chain, nb);
}
EXPORT_SYMBOL(unregister_memory_notifier);

/*
 * register_memory - Setup a sysfs device for a memory block
+1 −1
Original line number Diff line number Diff line
@@ -2426,7 +2426,7 @@ config CHELSIO_T3

config EHEA
	tristate "eHEA Ethernet support"
	depends on IBMEBUS && INET && SPARSEMEM
	depends on IBMEBUS && INET && SPARSEMEM && MEMORY_HOTPLUG
	select INET_LRO
	---help---
	  This driver supports the IBM pSeries eHEA ethernet adapter.
+98 −59
Original line number Diff line number Diff line
/*
 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
 *
 * Derived from Intel e1000 driver
 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
@@ -36,7 +36,6 @@
 * A very incomplete list of things that need to be dealt with:
 *
 * TODO:
 * Wake on LAN.
 * Add more ethtool functions.
 * Fix abstruse irq enable/disable condition described here:
 *	http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
@@ -638,21 +637,18 @@ static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
}

/*
 *TODO: do something or get rid of this
 * Force the PHY into power saving mode using vendor magic.
 */
#ifdef CONFIG_PM
static s32 atl1_phy_enter_power_saving(struct atl1_hw *hw)
static void atl1_phy_enter_power_saving(struct atl1_hw *hw)
{
/*    s32 ret_val;
 *    u16 phy_data;
 */
	atl1_write_phy_reg(hw, MII_DBG_ADDR, 0);
	atl1_write_phy_reg(hw, MII_DBG_DATA, 0x124E);
	atl1_write_phy_reg(hw, MII_DBG_ADDR, 2);
	atl1_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
	atl1_write_phy_reg(hw, MII_DBG_ADDR, 3);
	atl1_write_phy_reg(hw, MII_DBG_DATA, 0);

/*
    ret_val = atl1_write_phy_reg(hw, ...);
    ret_val = atl1_write_phy_reg(hw, ...);
    ....
*/
	return 0;
}
#endif

@@ -2784,64 +2780,93 @@ static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
	struct atl1_hw *hw = &adapter->hw;
	u32 ctrl = 0;
	u32 wufc = adapter->wol;
	u32 val;
	int retval;
	u16 speed;
	u16 duplex;

	netif_device_detach(netdev);
	if (netif_running(netdev))
		atl1_down(adapter);

	retval = pci_save_state(pdev);
	if (retval)
		return retval;

	atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
	atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
	if (ctrl & BMSR_LSTATUS)
	val = ctrl & BMSR_LSTATUS;
	if (val)
		wufc &= ~ATLX_WUFC_LNKC;

	/* reduce speed to 10/100M */
	if (wufc) {
		atl1_phy_enter_power_saving(hw);
		/* if resume, let driver to re- setup link */
		hw->phy_configured = false;
		atl1_set_mac_addr(hw);
		atlx_set_multi(netdev);
	if (val && wufc) {
		val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
		if (val) {
			if (netif_msg_ifdown(adapter))
				dev_printk(KERN_DEBUG, &pdev->dev,
					"error getting speed/duplex\n");
			goto disable_wol;
		}

		ctrl = 0;
		/* turn on magic packet wol */
		if (wufc & ATLX_WUFC_MAG)
			ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;

		/* turn on Link change WOL */
		if (wufc & ATLX_WUFC_LNKC)
			ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
		/* enable magic packet WOL */
		if (wufc & ATLX_WUFC_MAG)
			ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
		iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
		ioread32(hw->hw_addr + REG_WOL_CTRL);

		/* configure the mac */
		ctrl = MAC_CTRL_RX_EN;
		ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
			MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
		if (duplex == FULL_DUPLEX)
			ctrl |= MAC_CTRL_DUPLX;
		ctrl |= (((u32)adapter->hw.preamble_len &
			MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
		if (adapter->vlgrp)
			ctrl |= MAC_CTRL_RMV_VLAN;
		if (wufc & ATLX_WUFC_MAG)
			ctrl |= MAC_CTRL_BC_EN;
		iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
		ioread32(hw->hw_addr + REG_MAC_CTRL);

		/* turn on all-multi mode if wake on multicast is enabled */
		ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
		ctrl &= ~MAC_CTRL_DBG;
		ctrl &= ~MAC_CTRL_PROMIS_EN;
		if (wufc & ATLX_WUFC_MC)
			ctrl |= MAC_CTRL_MC_ALL_EN;
		else
			ctrl &= ~MAC_CTRL_MC_ALL_EN;
		/* poke the PHY */
		ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
		ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
		iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
		ioread32(hw->hw_addr + REG_PCIE_PHYMISC);

		/* turn on broadcast mode if wake on-BC is enabled */
		if (wufc & ATLX_WUFC_BC)
			ctrl |= MAC_CTRL_BC_EN;
		else
			ctrl &= ~MAC_CTRL_BC_EN;
		pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
		goto exit;
	}

		/* enable RX */
		ctrl |= MAC_CTRL_RX_EN;
		iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
		pci_enable_wake(pdev, PCI_D3hot, 1);
		pci_enable_wake(pdev, PCI_D3cold, 1);
	} else {
		iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
		pci_enable_wake(pdev, PCI_D3hot, 0);
		pci_enable_wake(pdev, PCI_D3cold, 0);
	if (!val && wufc) {
		ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
		iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
		ioread32(hw->hw_addr + REG_WOL_CTRL);
		iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
		ioread32(hw->hw_addr + REG_MAC_CTRL);
		hw->phy_configured = false;
		pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
		goto exit;
	}

	pci_save_state(pdev);
disable_wol:
	iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
	ioread32(hw->hw_addr + REG_WOL_CTRL);
	ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
	ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
	iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
	ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
	atl1_phy_enter_power_saving(hw);
	hw->phy_configured = false;
	pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
exit:
	if (netif_running(netdev))
		pci_disable_msi(adapter->pdev);
	pci_disable_device(pdev);

	pci_set_power_state(pdev, PCI_D3hot);
	pci_set_power_state(pdev, pci_choose_state(pdev, state));

	return 0;
}
@@ -2855,20 +2880,26 @@ static int atl1_resume(struct pci_dev *pdev)
	pci_set_power_state(pdev, PCI_D0);
	pci_restore_state(pdev);

	/* FIXME: check and handle */
	err = pci_enable_device(pdev);
	if (err) {
		if (netif_msg_ifup(adapter))
			dev_printk(KERN_DEBUG, &pdev->dev,
				"error enabling pci device\n");
		return err;
	}

	pci_set_master(pdev);
	iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
	pci_enable_wake(pdev, PCI_D3hot, 0);
	pci_enable_wake(pdev, PCI_D3cold, 0);

	iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
	atl1_reset(adapter);
	atl1_reset_hw(&adapter->hw);
	adapter->cmb.cmb->int_stats = 0;

	if (netif_running(netdev))
		atl1_up(adapter);
	netif_device_attach(netdev);

	atl1_via_workaround(adapter);

	return 0;
}
#else
@@ -2876,6 +2907,13 @@ static int atl1_resume(struct pci_dev *pdev)
#define atl1_resume NULL
#endif

static void atl1_shutdown(struct pci_dev *pdev)
{
#ifdef CONFIG_PM
	atl1_suspend(pdev, PMSG_SUSPEND);
#endif
}

#ifdef CONFIG_NET_POLL_CONTROLLER
static void atl1_poll_controller(struct net_device *netdev)
{
@@ -3122,7 +3160,8 @@ static struct pci_driver atl1_driver = {
	.probe = atl1_probe,
	.remove = __devexit_p(atl1_remove),
	.suspend = atl1_suspend,
	.resume = atl1_resume
	.resume = atl1_resume,
	.shutdown = atl1_shutdown
};

/*
+1 −1
Original line number Diff line number Diff line
/*
 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
 *
 * Derived from Intel e1000 driver
 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
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