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Commit 46fc4c90 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville
Browse files

ssb: implement spurious tone avoidance 



And make use of it in b43. This fixes a regression introduced with
49d55cef
b43: N-PHY: implement spurious tone avoidance
This commit made BCM4322 use only MCS 0 on channel 13, which of course
resulted in performance drop (down to 0.7Mb/s).

Reported-by: default avatarStefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 25b5632f

drivers/net/wireless/b43/phy_n.c

+2 −1
Original line number Diff line number Diff line
@@ -5165,7 +5165,8 @@ static void b43_nphy_pmu_spur_avoid(struct b43_wldev *dev, bool avoid) 
#endif

#ifdef CONFIG_B43_SSB

	case B43_BUS_SSB:

		/* FIXME */

		ssb_pmu_spuravoid_pllupdate(&dev->dev->sdev->bus->chipco,

					    avoid);

		break;

#endif

	}

drivers/ssb/driver_chipcommon_pmu.c

+29 −0
Original line number Diff line number Diff line
@@ -675,3 +675,32 @@ u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc) 
		return 0;

	}

}



void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)

{

	u32 pmu_ctl = 0;



	switch (cc->dev->bus->chip_id) {

	case 0x4322:

		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070);

		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a);

		ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854);

		if (spuravoid == 1)

			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828);

		else

			ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828);

		pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;

		break;

	case 43222:

		/* TODO: BCM43222 requires updating PLLs too */

		return;

	default:

		ssb_printk(KERN_ERR PFX

			   "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",

			   cc->dev->bus->chip_id);

		return;

	}



	chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl);

}

EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);

include/linux/ssb/ssb_driver_chipcommon.h

+2 −0
Original line number Diff line number Diff line
@@ -219,6 +219,7 @@ 
#define SSB_CHIPCO_PMU_CTL			0x0600 /* PMU control */

#define  SSB_CHIPCO_PMU_CTL_ILP_DIV		0xFFFF0000 /* ILP div mask */

#define  SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT	16

#define  SSB_CHIPCO_PMU_CTL_PLL_UPD		0x00000400

#define  SSB_CHIPCO_PMU_CTL_NOILPONW		0x00000200 /* No ILP on wait */

#define  SSB_CHIPCO_PMU_CTL_HTREQEN		0x00000100 /* HT req enable */

#define  SSB_CHIPCO_PMU_CTL_ALPREQEN		0x00000080 /* ALP req enable */
@@ -667,5 +668,6 @@ enum ssb_pmu_ldo_volt_id { 
void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,

			     enum ssb_pmu_ldo_volt_id id, u32 voltage);

void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on);

void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid);



#endif /* LINUX_SSB_CHIPCO_H_ */