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Commit 4450022b authored by Alistair Popple's avatar Alistair Popple Committed by Michael Ellerman
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powerpc/476fpe: Add support for kexec



PPC476FPE has a different PVR from previous PPC476 processors. The
kexec code checks the PVR in order to correctly setup the MMU. When
the initial support for 476FPE processors was added the corresponding
change in the kexec code was missed. This patch simply adds the check
and solves the following bug on kexec:

kexec: Starting new kernel
Bye!
Unable to handle kernel paging request for instruction fetch
Faulting instruction address: 0xee9a50f8
cpu 0x0: Vector: 400 (Instruction Access) at [ee9d7d20]
    pc: ee9a50f8
    lr: ee9a50e4
    sp: ee9d7dd0
    msr: 21020
    current = 0xee40f000
    pid   = 960, comm = kexec
enter ? for help
[link register   ] ee9a50e4
[ee9d7dd0] c0013748 default_machine_kexec+0x58/0x70 (unreliable)
[ee9d7df0] c0012f04 machine_kexec+0x34/0x40
[ee9d7e00] c00aa1ec kernel_kexec+0x9c/0xb0
[ee9d7e20] c005d704 SyS_reboot+0x1f4/0x220
[ee9d7f40] c000db68 ret_from_syscall+0x0/0x3c

Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 5d2aa710
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+2 −0
Original line number Original line Diff line number Diff line
@@ -743,6 +743,8 @@ relocate_new_kernel:
	/* Check for 47x cores */
	/* Check for 47x cores */
	mfspr	r3,SPRN_PVR
	mfspr	r3,SPRN_PVR
	srwi	r3,r3,16
	srwi	r3,r3,16
	cmplwi	cr0,r3,PVR_476FPE@h
	beq	setup_map_47x
	cmplwi	cr0,r3,PVR_476@h
	cmplwi	cr0,r3,PVR_476@h
	beq	setup_map_47x
	beq	setup_map_47x
	cmplwi	cr0,r3,PVR_476_ISS@h
	cmplwi	cr0,r3,PVR_476_ISS@h