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Commit 4247417d authored by Yoichi Yuasa's avatar Yoichi Yuasa Committed by Ralf Baechle
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[MIPS] add DECstation I/O ASIC clocksource 



Add DECstation I/O ASIC clocksource

Signed-off-by: default avatarYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 05a96fae

arch/mips/Kconfig

+4 −0
Original line number Original line Diff line number Diff line
@@ -82,6 +82,7 @@ config MACH_DECSTATION 
	bool "DECstations"

	bool "DECstations"

	select BOOT_ELF32

	select BOOT_ELF32

	select CEVT_R4K

	select CEVT_R4K

	select CSRC_IOASIC

	select CSRC_R4K

	select CSRC_R4K

	select CPU_DADDI_WORKAROUNDS if 64BIT

	select CPU_DADDI_WORKAROUNDS if 64BIT

	select CPU_R4000_WORKAROUNDS if 64BIT

	select CPU_R4000_WORKAROUNDS if 64BIT
@@ -784,6 +785,9 @@ config CEVT_TXX9 
config CSRC_BCM1480

config CSRC_BCM1480

	bool

	bool





config CSRC_IOASIC

	bool



config CSRC_R4K

config CSRC_R4K

	bool

	bool

arch/mips/dec/time.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -165,7 +165,7 @@ void __init plat_time_init(void) 




	if (!cpu_has_counter && IOASIC)

	if (!cpu_has_counter && IOASIC)

		/* For pre-R4k systems we use the I/O ASIC's counter.  */

		/* For pre-R4k systems we use the I/O ASIC's counter.  */

		clocksource_mips.read = dec_ioasic_hpt_read;

		dec_ioasic_clocksource_init();





	/* Set up the rate of periodic DS1287 interrupts.  */

	/* Set up the rate of periodic DS1287 interrupts.  */

	CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);

	CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);

arch/mips/kernel/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o 
obj-$(CONFIG_CEVT_SB1250)	+= cevt-sb1250.o

obj-$(CONFIG_CEVT_SB1250)	+= cevt-sb1250.o

obj-$(CONFIG_CEVT_TXX9)		+= cevt-txx9.o

obj-$(CONFIG_CEVT_TXX9)		+= cevt-txx9.o

obj-$(CONFIG_CSRC_BCM1480)	+= csrc-bcm1480.o

obj-$(CONFIG_CSRC_BCM1480)	+= csrc-bcm1480.o

obj-$(CONFIG_CSRC_IOASIC)	+= csrc-ioasic.o

obj-$(CONFIG_CSRC_R4K)		+= csrc-r4k.o

obj-$(CONFIG_CSRC_R4K)		+= csrc-r4k.o

obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o

obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o

obj-$(CONFIG_SYNC_R4K)		+= sync-r4k.o

obj-$(CONFIG_SYNC_R4K)		+= sync-r4k.o

arch/mips/kernel/csrc-ioasic.c

0 → 100644
+65 −0
Original line number Original line Diff line number Diff line 
/*

 *  DEC I/O ASIC's counter clocksource

 *

 *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License as published by

 *  the Free Software Foundation; either version 2 of the License, or

 *  (at your option) any later version.

 *

 *  This program is distributed in the hope that it will be useful,

 *  but WITHOUT ANY WARRANTY; without even the implied warranty of

 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *  GNU General Public License for more details.

 *

 *  You should have received a copy of the GNU General Public License

 *  along with this program; if not, write to the Free Software

 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA

 */

#include <linux/clocksource.h>

#include <linux/init.h>



#include <asm/ds1287.h>

#include <asm/time.h>

#include <asm/dec/ioasic.h>

#include <asm/dec/ioasic_addrs.h>



static cycle_t dec_ioasic_hpt_read(void)

{

	return ioasic_read(IO_REG_FCTR);

}



static struct clocksource clocksource_dec = {

	.name		= "dec-ioasic",

	.read		= dec_ioasic_hpt_read,

	.mask		= CLOCKSOURCE_MASK(32),

	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,

};



void __init dec_ioasic_clocksource_init(void)

{

	unsigned int freq;

	u32 start, end;

	int i = HZ / 10;





	while (!ds1287_timer_state())

		;



	start = dec_ioasic_hpt_read();



	while (i--)

		while (!ds1287_timer_state())

			;



	end = dec_ioasic_hpt_read();



	freq = (end - start) * 10;

	printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);



	clocksource_dec.rating = 200 + freq / 10000000;

	clocksource_set_clock(&clocksource_dec, freq);



	clocksource_register(&clocksource_dec);

}

include/asm-mips/dec/ioasic.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -33,4 +33,6 @@ static inline u32 ioasic_read(unsigned int reg) 




extern void init_ioasic_irqs(int base);

extern void init_ioasic_irqs(int base);





extern void dec_ioasic_clocksource_init(void);



#endif /* __ASM_DEC_IOASIC_H */
 
#endif /* __ASM_DEC_IOASIC_H */