MIPS: ralink: Unify SoC id handling (418d29c8) · Commits · e / devices / android_kernel_teracube_emerald

arch/mips/include/asm/mach-ralink/mt7620.h

+0 −7

Original line number	Original line	Diff line number	Diff line
	@@ -13,13 +13,6 @@
	#ifndef _MT7620_REGS_H_		#ifndef _MT7620_REGS_H_
	#define _MT7620_REGS_H_		#define _MT7620_REGS_H_

	enum mt762x_soc_type {
	MT762X_SOC_UNKNOWN = 0,
	MT762X_SOC_MT7620A,
	MT762X_SOC_MT7620N,
	MT762X_SOC_MT7628AN,
	};

	#define MT7620_SYSC_BASE 0x10000000		#define MT7620_SYSC_BASE 0x10000000

	#define SYSC_REG_CHIP_NAME0 0x00		#define SYSC_REG_CHIP_NAME0 0x00

arch/mips/include/asm/mach-ralink/ralink_regs.h

+17 −0

Original line number	Original line	Diff line number	Diff line
	@@ -13,6 +13,23 @@
	#ifndef _RALINK_REGS_H_		#ifndef _RALINK_REGS_H_
	#define _RALINK_REGS_H_		#define _RALINK_REGS_H_

			enum ralink_soc_type {
			RALINK_UNKNOWN = 0,
			RT2880_SOC,
			RT3883_SOC,
			RT305X_SOC_RT3050,
			RT305X_SOC_RT3052,
			RT305X_SOC_RT3350,
			RT305X_SOC_RT3352,
			RT305X_SOC_RT5350,
			MT762X_SOC_MT7620A,
			MT762X_SOC_MT7620N,
			MT762X_SOC_MT7621AT,
			MT762X_SOC_MT7628AN,
			MT762X_SOC_MT7688,
			};
			extern enum ralink_soc_type ralink_soc;

	extern __iomem void *rt_sysc_membase;		extern __iomem void *rt_sysc_membase;
	extern __iomem void *rt_memc_membase;		extern __iomem void *rt_memc_membase;

arch/mips/include/asm/mach-ralink/rt305x.h

+6 −15

Original line number	Original line	Diff line number	Diff line
	@@ -13,25 +13,16 @@
	#ifndef _RT305X_REGS_H_		#ifndef _RT305X_REGS_H_
	#define _RT305X_REGS_H_		#define _RT305X_REGS_H_

	enum rt305x_soc_type {		extern enum ralink_soc_type ralink_soc;
	RT305X_SOC_UNKNOWN = 0,
	RT305X_SOC_RT3050,
	RT305X_SOC_RT3052,
	RT305X_SOC_RT3350,
	RT305X_SOC_RT3352,
	RT305X_SOC_RT5350,
	};

	extern enum rt305x_soc_type rt305x_soc;

	static inline int soc_is_rt3050(void)		static inline int soc_is_rt3050(void)
	{		{
	return rt305x_soc == RT305X_SOC_RT3050;		return ralink_soc == RT305X_SOC_RT3050;
	}		}

	static inline int soc_is_rt3052(void)		static inline int soc_is_rt3052(void)
	{		{
	return rt305x_soc == RT305X_SOC_RT3052;		return ralink_soc == RT305X_SOC_RT3052;
	}		}

	static inline int soc_is_rt305x(void)		static inline int soc_is_rt305x(void)
	@@ -41,17 +32,17 @@ static inline int soc_is_rt305x(void)

	static inline int soc_is_rt3350(void)		static inline int soc_is_rt3350(void)
	{		{
	return rt305x_soc == RT305X_SOC_RT3350;		return ralink_soc == RT305X_SOC_RT3350;
	}		}

	static inline int soc_is_rt3352(void)		static inline int soc_is_rt3352(void)
	{		{
	return rt305x_soc == RT305X_SOC_RT3352;		return ralink_soc == RT305X_SOC_RT3352;
	}		}

	static inline int soc_is_rt5350(void)		static inline int soc_is_rt5350(void)
	{		{
	return rt305x_soc == RT305X_SOC_RT5350;		return ralink_soc == RT305X_SOC_RT5350;
	}		}

	#define RT305X_SYSC_BASE 0x10000000		#define RT305X_SYSC_BASE 0x10000000

arch/mips/ralink/mt7620.c

+6 −9

Original line number	Original line	Diff line number	Diff line
	@@ -37,9 +37,6 @@
	#define PMU1_CFG 0x8C		#define PMU1_CFG 0x8C
	#define DIG_SW_SEL BIT(25)		#define DIG_SW_SEL BIT(25)

	/* is this a MT7620 or a MT7628 */
	enum mt762x_soc_type mt762x_soc;

	/* EFUSE bits */		/* EFUSE bits */
	#define EFUSE_MT7688 0x100000		#define EFUSE_MT7688 0x100000

	@@ -235,8 +232,8 @@ static struct rt2880_pmx_group mt7628an_pinmux_data[] = {

	static inline int is_mt76x8(void)		static inline int is_mt76x8(void)
	{		{
	return mt762x_soc == MT762X_SOC_MT7628AN \|\|		return ralink_soc == MT762X_SOC_MT7628AN \|\|
	mt762x_soc == MT762X_SOC_MT7688;		ralink_soc == MT762X_SOC_MT7688;
	}		}

	static __init u32		static __init u32
	@@ -511,11 +508,11 @@ void prom_soc_init(struct ralink_soc_info *soc_info)

	if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) {		if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) {
	if (bga) {		if (bga) {
	mt762x_soc = MT762X_SOC_MT7620A;		ralink_soc = MT762X_SOC_MT7620A;
	name = "MT7620A";		name = "MT7620A";
	soc_info->compatible = "ralink,mt7620a-soc";		soc_info->compatible = "ralink,mt7620a-soc";
	} else {		} else {
	mt762x_soc = MT762X_SOC_MT7620N;		ralink_soc = MT762X_SOC_MT7620N;
	name = "MT7620N";		name = "MT7620N";
	soc_info->compatible = "ralink,mt7620n-soc";		soc_info->compatible = "ralink,mt7620n-soc";
	#ifdef CONFIG_PCI		#ifdef CONFIG_PCI
	@@ -526,10 +523,10 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
	u32 efuse = __raw_readl(sysc + SYSC_REG_EFUSE_CFG);		u32 efuse = __raw_readl(sysc + SYSC_REG_EFUSE_CFG);

	if (efuse & EFUSE_MT7688) {		if (efuse & EFUSE_MT7688) {
	mt762x_soc = MT762X_SOC_MT7688;		ralink_soc = MT762X_SOC_MT7688;
	name = "MT7688";		name = "MT7688";
	} else {		} else {
	mt762x_soc = MT762X_SOC_MT7628AN;		ralink_soc = MT762X_SOC_MT7628AN;
	name = "MT7628AN";		name = "MT7628AN";
	}		}
	soc_info->compatible = "ralink,mt7628an-soc";		soc_info->compatible = "ralink,mt7628an-soc";

arch/mips/ralink/prom.c

+5 −0

Original line number	Original line	Diff line number	Diff line
	@@ -15,11 +15,16 @@
	#include <asm/bootinfo.h>		#include <asm/bootinfo.h>
	#include <asm/addrspace.h>		#include <asm/addrspace.h>

			#include <asm/mach-ralink/ralink_regs.h>

	#include "common.h"		#include "common.h"

	struct ralink_soc_info soc_info;		struct ralink_soc_info soc_info;
	struct rt2880_pmx_group *rt2880_pinmux_data = NULL;		struct rt2880_pmx_group *rt2880_pinmux_data = NULL;

			enum ralink_soc_type ralink_soc;
			EXPORT_SYMBOL_GPL(ralink_soc);

	const char *get_system_type(void)		const char *get_system_type(void)
	{		{
	return soc_info.sys_type;		return soc_info.sys_type;