Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 41639fed authored by Malli Chilakala's avatar Malli Chilakala Committed by Jeff Garzik
Browse files

[PATCH] ixgb: Reset status in the Rx 



Reset status in the Rx descriptor prior to handing it to the controller.
Leave three Rx descriptors unused

Signed-off-by: default avatarMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com>
Signed-off-by: default avatarGanesh Venkatesan <ganesh.venkatesan@intel.com>
Signed-off-by: default avatarJohn Ronciak <john.ronciak@intel.com>

diff -up net-drivers-2.6/drivers/net/ixgb/ixgb_main.c net-drivers-2.6/drivers/net/ixgb.new/ixgb_main.c
parent 6dfbb6dd

drivers/net/ixgb/ixgb_main.c

+6 −2
Original line number Diff line number Diff line
@@ -1977,8 +1977,8 @@ ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter) 


	num_group_tail_writes = IXGB_RX_BUFFER_WRITE;



	/* leave one descriptor unused */

	while(--cleancount > 0) {

	/* leave three descriptors unused */

	while(--cleancount > 2) {

		rx_desc = IXGB_RX_DESC(*rx_ring, i);



		skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
@@ -2005,6 +2005,10 @@ ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter) 
				   PCI_DMA_FROMDEVICE);



		rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);

		/* guarantee DD bit not set now before h/w gets descriptor

		 * this is the rest of the workaround for h/w double 

		 * writeback. */

		rx_desc->status = 0;



		if((i & ~(num_group_tail_writes- 1)) == i) {

			/* Force memory writes to complete before letting h/w